more debugging

Author: vDorst

embassy-stm32/src/dma/ringbuffer.rs

@@ -313,6 +313,16 @@ impl<'a, W: Word> WritableDmaRingBuffer<'a, W> {
             // Confirm that the DMA is not inside data we could have written
             let (pos, complete_count) = critical_section::with(|_| (self.pos(dma), dma.get_complete_count()));
             if (pos >= self.end && pos < start) || (complete_count > 0 && pos >= start) || complete_count > 1 {
+                // defmt::error!(
+                //     "OR1 P{}, S{} E{} C{} L{} cc{}",
+                //     pos,
+                //     start,
+                //     self.end,
+                //     self.cap(),
+                //     len,
+                //     complete_count
+                // );
+                self.end = (self.end + len) % self.cap();
                 Err(OverrunError)
             } else {
                 self.end = (self.end + len) % self.cap();
@@ -333,6 +343,8 @@ impl<'a, W: Word> WritableDmaRingBuffer<'a, W> {
             // Confirm that the DMA is not inside data we could have written
             let pos = self.pos(dma);
             if pos > self.end || pos < start || dma.get_complete_count() > 1 {
+                // defmt::error!("OR2 P{}, S{} E{} C{} L{}", pos, start, self.end, self.cap(), len);
+                self.end = (self.end + len) % self.cap();
                 Err(OverrunError)
             } else {
                 self.end = (self.end + len) % self.cap();
@@ -351,6 +363,7 @@ impl<'a, W: Word> WritableDmaRingBuffer<'a, W> {
             // Confirm that the DMA is not inside data we could have written
             let pos = self.pos(dma);
             if pos > self.end || pos < start || dma.reset_complete_count() > 1 {
+                // defmt::error!("OR3 P{}, S{} E{} C{}", pos, start, self.end, self.cap());
                 Err(OverrunError)
             } else {
                 self.end = head;

embassy-stm32/src/i2s.rs

@@ -3,7 +3,7 @@ use core::sync::atomic::{fence, Ordering};
 
 use embassy_hal_internal::into_ref;
 
-use crate::dma::{ringbuffer, word, Channel, NoDma, TransferOptions, WritableRingBuffer};
+use crate::dma::{word, Channel, NoDma, TransferOptions, WritableRingBuffer};
 use crate::gpio::sealed::{AFType, Pin as _};
 use crate::gpio::AnyPin;
 use crate::pac::spi::vals;
@@ -196,7 +196,7 @@ impl<'d, T: Instance, C: Channel, W: word::Word> I2S<'d, T, C, W> {
         let spi = Spi::new_internal(peri, NoDma, NoDma, spi_cfg);
 
         #[cfg(all(rcc_f4, not(stm32f410)))]
-        let pclk = Hertz(38_400_000); // unsafe { get_freqs() }.plli2s1_r.unwrap();
+        let pclk = Hertz(2 * 38_400_000); // unsafe { get_freqs() }.plli2s1_r.unwrap();
 
         #[cfg(stm32f410)]
         let pclk = T::frequency();
@@ -395,23 +395,22 @@ impl<'d, T: Instance, C: Channel, W: word::Word> I2S<'d, T, C, W> {
     // }
 
     /// Write audio data.
-    pub async fn write(&mut self, data: &[W]) -> Result<(), Error> {
-        self.ring_buffer.write_exact(data).await.map_err(|_| Error::Overrun)?;
-        Ok(())
+    pub async fn write(&mut self, data: &[W]) -> Result<usize, Error> {
+        self.ring_buffer.write_exact(data).await.map_err(|_| Error::Overrun)
     }
 
     /// Start the I2S driver.
     pub fn start(&mut self) {
+        T::REGS.cr1().modify(|w| {
+            w.set_spe(true);
+        });
+
         self.ring_buffer.start();
 
         #[cfg(not(any(spi_v3, spi_v4, spi_v5)))]
         T::REGS.cr2().modify(|reg| {
             reg.set_txdmaen(true);
         });
-
-        T::REGS.cr1().modify(|w| {
-            w.set_spe(true);
-        });
     }
 
     /// Stop the I2S driver.