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Merge pull request #98 from the-snowwhite/qsys_dts
Update addresses of qsys cores to be consistent across quartus projects
2 parents ec81fda + c6ef9cf commit efd3e36

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10 files changed

+665
-319
lines changed

10 files changed

+665
-319
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HW/QuartusProjects/DE0_Nano_SoC_Cramps/soc_system.qsys

Lines changed: 130 additions & 43 deletions
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HW/QuartusProjects/DE0_Nano_SoC_DB25/DE0_Nano_SoC_DB25.vhd

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -275,14 +275,7 @@ begin
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-- mk_io_hm2_we => hm_chipsel, -- .hm2_chipsel
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mk_io_hm2_int_in => irq, -- .hm2_int_in
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clk_100mhz_out_clk => hm_clk_med, -- clk_100mhz_out.clk
278-
clk_200mhz_out_clk => hm_clk_high, -- clk_100mhz_out.clk
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adc_io_convst => ADC_CONVST, -- adc.CONVST
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adc_io_sck => ADC_SCK, -- .SCK
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adc_io_sdi => ADC_SDI, -- .SDI
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adc_io_sdo => ADC_SDO -- .SDO
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-- axi_str_data => out_data[7:0], -- stream_port.data
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-- axi_str_valid => out_data[8], -- .valid
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-- axi_str_ready => ar_in_sig[1]) -- .ready
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clk_200mhz_out_clk => hm_clk_high -- clk_100mhz_out.clk
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);
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-- Debounce logic to clean out glitches within 1ms

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