Merge pull request #95 from the-snowwhite/DE10_Nano_SoC_FB_DB25

De10 nano soc fb db25

Author: cdsteinkuehler

HW/QuartusProjects/.gitignore

@@ -54,7 +54,6 @@
 *~
 *.tar.gz
 *.pin
-*.mif
 *.hex
 *.ddb
 #*.stp

HW/QuartusProjects/DE10_Nano_FB_Cramps/I2C_Controller.v renamed to HW/QuartusProjects/Common/I2C_Controller.v

@@ -1,12 +1,12 @@
 // --------------------------------------------------------------------
-// Copyright (c) 2005 by Terasic Technologies Inc.
+// Copyright (c) 2005 by Terasic Technologies Inc. 
 // --------------------------------------------------------------------
 //
 // Permission:
 //
 //   Terasic grants permission to use and modify this code for use
-//   in synthesis for all Terasic Development Boards and Altrea Development
-//   Kits made by Terasic.  Other use of this code, including the selling
+//   in synthesis for all Terasic Development Boards and Altrea Development 
+//   Kits made by Terasic.  Other use of this code, including the selling 
 //   ,duplication, or modification of any portion is strictly prohibited.
 //
 // Disclaimer:
@@ -15,11 +15,11 @@
 //   which illustrates how these types of functions can be implemented.
 //   It is the user's responsibility to verify their design for
 //   consistency and functionality through the use of formal
-//   verification methods.  Terasic provides no warranty regarding the use
+//   verification methods.  Terasic provides no warranty regarding the use 
 //   or functionality of this code.
 //
 // --------------------------------------------------------------------
-//
+//           
 //                     Terasic Technologies Inc
 //                     356 Fu-Shin E. Rd Sec. 1. JhuBei City,
 //                     HsinChu County, Taiwan
@@ -40,36 +40,36 @@
 //   V1.0 :| Joe Yang          :| 05/07/10  :|      Initial Revision
 //   V2.0 :| Joe Yang          :| 12/12/16  :|      Initial Revision
 // --------------------------------------------------------------------
-module I2Cv2_Controller (
+module I2C_Controller (
 	input  CLOCK,
-	input  [23:0]I2C_DATA,
+	input  [23:0]I2C_DATA,	
 	input  GO,
-	input  RESET,
+	input  RESET,	
 	input  W_R,
- 	inout  I2C_SDAT,
+ 	inout  I2C_SDAT,	
 	output I2C_SCLK,
-	output END,
+	output END,	
 	output ACK
 );
 
-wire SDAO ;
+wire SDAO ; 
 
-assign I2C_SDAT = SDAO?1'bz :0  ;
+assign I2C_SDAT = SDAO?1'bz :0  ; 
 
 I2C_WRITE_WDATA  wrd(
    .RESET_N  ( RESET),
 	.PT_CK    ( CLOCK),
 	.GO       ( GO   ),
 	.END_OK   ( END  ),
 	.ACK_OK   ( ACK  ),
-	.BYTE_NUM ( 2    ),  //2byte
+	.BYTE_NUM ( 2    ),  //2byte	
 	.SDAI     ( I2C_SDAT ),//IN
 	.SDAO     ( SDAO     ),//OUT
-	.SCLO     ( I2C_SCLK ),
+	.SCLO     ( I2C_SCLK ),	
 	.SLAVE_ADDRESS( I2C_DATA[23:16] ),
-	.REG_DATA     ( I2C_DATA[15:0]  )
-);
-
-
+	.REG_DATA     ( I2C_DATA[15:0]  )	
+);	
+	
+	
 
 endmodule

HW/QuartusProjects/DE10_Nano_FB_Cramps/I2C_HDMI_Config.v renamed to HW/QuartusProjects/Common/I2C_HDMI_Config.v

@@ -14,7 +14,7 @@ input				iRST_N;
 output			I2C_SCLK;
 inout				I2C_SDAT;
 input				HDMI_TX_INT;
-output READY ;
+output READY ; 
 
 //	Internal Registers/Wires
 reg	[15:0]	mI2C_CLK_DIV;
@@ -26,7 +26,7 @@ wire				mI2C_ACK;
 reg	[15:0]	LUT_DATA;
 reg	[5:0]		LUT_INDEX;
 reg	[3:0]		mSetup_ST;
-reg READY ;
+reg READY ; 
 
 //	Clock Setting
 parameter	CLK_Freq	=	50000000;	//	50	MHz
@@ -54,12 +54,12 @@ begin
 	end
 end
 ////////////////////////////////////////////////////////////////////
-I2Cv2_Controller 	u0	(	.CLOCK(mI2C_CTRL_CLK),	//	Controller Work Clock
+I2C_Controller 	u0	(	.CLOCK(mI2C_CTRL_CLK),	//	Controller Work Clock
 						.I2C_SCLK(I2C_SCLK),				//	I2C CLOCK
  	 	 	 	 	 	.I2C_SDAT(I2C_SDAT),				//	I2C DATA
 						.I2C_DATA(mI2C_DATA),			//	DATA:[SLAVE_ADDR,SUB_ADDR,DATA]
 						.GO(mI2C_GO),						//	GO transfor
-						.END(mI2C_END),					//	END transfor
+						.END(mI2C_END),					//	END transfor 
 						.ACK(mI2C_ACK),					//	ACK
 						.RESET(iRST_N)	);
 ////////////////////////////////////////////////////////////////////
@@ -90,7 +90,7 @@ begin
 						if(!mI2C_ACK)
 						mSetup_ST	<=	2;
 						else
-						mSetup_ST	<=	0;
+						mSetup_ST	<=	0;							
 						mI2C_GO		<=	0;
 					end
 				end
@@ -102,7 +102,7 @@ begin
 		end
 		else
 		begin
-		  READY<=1;
+		  READY<=1; 
 		  if(!HDMI_TX_INT)
 		  begin
 		    LUT_INDEX <= 0;
@@ -113,11 +113,11 @@ begin
 	end
 end
 ////////////////////////////////////////////////////////////////////
-/////////////////////	Config Data LUT	  //////////////////////////
+/////////////////////	Config Data LUT	  //////////////////////////	
 always
 begin
 	case(LUT_INDEX)
-
+	
 	//	Video Config Data
 	0	:	LUT_DATA	<=	16'h9803;  //Must be set to 0x03 for proper operation
 	1	:	LUT_DATA	<=	16'h0100;  //Set 'N' value at 6144
@@ -155,4 +155,4 @@ begin
 	endcase
 end
 ////////////////////////////////////////////////////////////////////
-endmodule
+endmodule

HW/QuartusProjects/DE10_Nano_FB_Cramps/I2C_WRITE_WDATA.v renamed to HW/QuartusProjects/Common/I2C_WRITE_WDATA.v

@@ -0,0 +1,3 @@
+set_global_assignment -name VERILOG_FILE ../Common/I2C_Controller.v
+set_global_assignment -name VERILOG_FILE ../Common/I2C_HDMI_Config.v
+set_global_assignment -name VERILOG_FILE ../Common/I2C_WRITE_WDATA.v