@@ -79,6 +79,7 @@ parameter NumGPIO = 2;
7979
8080parameter Capsense = 1 ;
8181parameter NumSense = 4 ;
82+ parameter int Capsense_Pins[NumSense: 0 ] = '{ 40 , 39 , 38 , 37 , 36 } ;
8283parameter ADC = " " ;
8384parameter Mux_En = 1 ;
8485// local param
@@ -148,17 +149,17 @@ parameter TotalNumregs = Mux_regPrIOReg * NumIOAddrReg * NumPinsPrIOAddr;
148149
149150// Touch sensor:
150151 reg [BusWidth- 1 : 0 ] hysteresis_reg;
151- reg [1 : 0 ]sr_delay;
152+ reg [1 : 0 ] sr_delay;
152153 reg reset_sr;
153- reg [2 : 0 ]sr_init_delay;
154+ reg [2 : 0 ] sr_init_delay;
154155 reg reset_init_sr;
155156 wire [NumSense- 1 : 0 ] sense;
156157 wire charge;
157158 wire [3 : 0 ] hysteresis[NumSense- 1 : 0 ];
158159
159160 wire sr_delay_act;
160161 wire sr_init_delay_act;
161- wire sense_reset;
162+ wire sense_reset;
162163// wire sense_reset = ~reset_reg_N;
163164
164165 genvar sh;
@@ -169,22 +170,22 @@ parameter TotalNumregs = Mux_regPrIOReg * NumIOAddrReg * NumPinsPrIOAddr;
169170 endgenerate
170171
171172
172- adc_ltc2308_fifo adc_ltc2308_fifo_inst
173- (
174- .clock (CLOCK ) , // input clock_sig
175- .reset_n (reset_reg_N) , // input reset_n_sig
176- .addr (busaddress[2 ]) , // input addr_sig
177- .read_outdata (adc_read_valid) , // input read_sig
178- .write (adc_write_valid) , // input write_sig
179- .readdataout (adc_data_out) , // output [31:0] readdataout_sig
180- .writedatain (busdata_in) , // input [31:0] writedatain_sig
181- // ADC
182- .adc_clk (adc_clk) , // input adc_clk_sig
183- .ADC_CONVST_o (ADC_CONVST_o) , // output ADC_CONVST_o_sig
184- .ADC_SCK_o (ADC_SCK_o) , // output ADC_SCK_o_sig
185- .ADC_SDI_o (ADC_SDI_o) , // output ADC_SDI_o_sig
186- .ADC_SDO_i (ADC_SDO_i) // input ADC_SDO_i_sig
187- );
173+ adc_ltc2308_fifo adc_ltc2308_fifo_inst
174+ (
175+ .clock (CLOCK ) , // input clock_sig
176+ .reset_n (reset_reg_N) , // input reset_n_sig
177+ .addr (busaddress[2 ]) , // input addr_sig
178+ .read_outdata (adc_read_valid) , // input read_sig
179+ .write (adc_write_valid) , // input write_sig
180+ .readdataout (adc_data_out) , // output [31:0] readdataout_sig
181+ .writedatain (busdata_in) , // input [31:0] writedatain_sig
182+ // ADC
183+ .adc_clk (adc_clk) , // input adc_clk_sig
184+ .ADC_CONVST_o (ADC_CONVST_o) , // output ADC_CONVST_o_sig
185+ .ADC_SCK_o (ADC_SCK_o) , // output ADC_SCK_o_sig
186+ .ADC_SDI_o (ADC_SDI_o) , // output ADC_SDI_o_sig
187+ .ADC_SDO_i (ADC_SDO_i) // input ADC_SDO_i_sig
188+ );
188189
189190
190191// I/O stuff:
@@ -260,26 +261,27 @@ adc_ltc2308_fifo adc_ltc2308_fifo_inst
260261 assign mux_reg_index = busaddress_r - 16'h1120 ;
261262 assign mux_reg_addr = (mux_reg_index[6 : 2 ]);
262263 assign mux_reg_byte = (mux_reg_index[1 : 0 ]);
263- generate if (Capsense >= 1 ) begin
264- // Writes:
265- always @ ( posedge reset_in or posedge write_address) begin
266- if (reset_in) begin
267- hysteresis_reg <= 32'h22222222 ;
268- reset_sr <= 1'b0 ;
269- end
270- else if ( write_address ) begin
271- if (busaddress_r == 10'h0304 ) begin
272- hysteresis_reg <= busdata_in_r;
273- reset_sr <= 1'b1 ;
274- end
275- else begin
276- hysteresis_reg <= hysteresis_reg;
264+
265+ generate if (Capsense >= 1 ) begin
266+ // Writes:
267+ always @ ( posedge reset_in or posedge write_address) begin
268+ if (reset_in) begin
269+ hysteresis_reg <= 32'h22222222 ;
277270 reset_sr <= 1'b0 ;
278271 end
272+ else if ( write_address ) begin
273+ if (busaddress_r == 10'h0304 ) begin
274+ hysteresis_reg <= busdata_in_r;
275+ reset_sr <= 1'b1 ;
276+ end
277+ else begin
278+ hysteresis_reg <= hysteresis_reg;
279+ reset_sr <= 1'b0 ;
280+ end
281+ end
279282 end
280283 end
281- end
282- endgenerate
284+ endgenerate
283285
284286 always @ (posedge reg_clk) begin
285287 sr_delay[0 ] <= reset_sr;
@@ -327,55 +329,68 @@ endgenerate
327329 end
328330 end
329331 endgenerate
330- /*
331- genvar bloop;
332+
333+ wire [((GPIOWidth * NumGPIO)- 1 ): 0 ] gpio_out_data;
334+ genvar cl,ci0,ci1;
332335 generate
333- for(bloop=0;bloop<NumGPIO;bloop=bloop+1) begin : gpiooutloop
334- bidir_io #(.IOWidth(GPIOWidth),.PortNumWidth(PortNumWidth)) bidir_io_inst
336+ if (Capsense >= 1 ) begin
337+ for (cl= 0 ;cl< (GPIOWidth * NumGPIO)- 1 ;cl++ ) begin : capsenseloop
338+ // .out_data({iodatafromhm3[1][GPIOWidth-1:5],4'bz,charge, iodatafromhm3[0]}) , // input [IOIOWidth-1:0] out_data_sig
339+ if (cl<= 35 ) begin
340+ if (Capsense_Pins[0 ] == cl) begin
341+ assign gpio_out_data[cl] = charge;
342+ end
343+ else begin
344+ for (ci0= 1 ;ci0< NumSense+ 1 ;ci0++ )begin : capsense0loop
345+ if (Capsense_Pins[ci0] == cl) begin
346+ assign gpio_out_data[cl] = 1'bz ;
347+ end
348+ else begin
349+ assign gpio_out_data[cl] = iodatafromhm3[0 ][cl];
350+ end
351+ end
352+ end
353+ end
354+ else begin
355+ if (Capsense_Pins[0 ] == cl) begin
356+ assign gpio_out_data[cl] = charge;
357+ end
358+ else begin
359+ for (ci1= 1 ;ci1< NumSense+ 1 ;ci1++ ) begin : capsense1loop
360+ if (Capsense_Pins[ci1] == cl) begin
361+ assign gpio_out_data[cl] = 1'bz ;
362+ end
363+ else begin
364+ assign gpio_out_data[cl] = iodatafromhm3[1 ][cl- 36 ];
365+ end
366+ end
367+ end
368+ end
369+ end
370+ bidir_io # (.IOWidth (GPIOWidth * NumGPIO),.PortNumWidth (PortNumWidth),.Mux_En (Mux_En)) bidir_io_inst
335371 (
336372 .clk (reg_clk),
337- .portselnum(portnumsel[bloop]),
338- .out_ena(out_ena[bloop]) , // input out_ena_sig
339- .od(od[bloop]) , // input od_sig
340- .out_data(iodatafromhm3[bloop]) , // input [IOIOWidth-1:0] out_data_sig
341- .gpioport(gpioport[bloop]) , // inout [IOIOWidth-1:0] gpioport_sig
342- .gpio_in_data(gpio_input_data[bloop]) // output [IOIOWidth-1:0] read_data_sig
373+ .portselnum (portnumsel),
374+ .out_ena ({ out_ena[1 ],out_ena[0 ]} ) , // input out_ena_sig
375+ .od ({ od[1 ],od[0 ]} ) , // input od_sig
376+ .out_data (gpio_out_data) , // input [IOIOWidth-1:0] out_data_sig
377+ .gpioport ({ gpioport[1 ],gpioport[0 ]} ) , // inout [IOIOWidth-1:0] gpioport_sig
378+ .data_from_gpio ({ gpio_input_data[1 ],gpio_input_data[0 ]} ) // output [IOIOWidth-1:0] read_data_sig
379+ );
380+ end
381+ else begin
382+ bidir_io # (.IOWidth (GPIOWidth * NumGPIO),.PortNumWidth (PortNumWidth),.Mux_En (Mux_En)) bidir_io_inst
383+ (
384+ .clk (reg_clk),
385+ .portselnum (portnumsel),
386+ .out_ena ({ out_ena[1 ],out_ena[0 ]} ) , // input out_ena_sig
387+ .od ({ od[1 ],od[0 ]} ) , // input od_sig
388+ .out_data ({ iodatafromhm3[1 ], iodatafromhm3[0 ]} ) , // input [IOIOWidth-1:0] out_data_sig
389+ .gpioport ({ gpioport[1 ],gpioport[0 ]} ) , // inout [IOIOWidth-1:0] gpioport_sig
390+ .data_from_gpio ({ gpio_input_data[1 ],gpio_input_data[0 ]} ) // output [IOIOWidth-1:0] read_data_sig
343391 );
344- // defparam bidir_io_inst[il].IOWidth = GPIOWidth;
345- // defparam bidir_io_inst[il].PortNumWidth = PortNumWidth;
346392 end
347393 endgenerate
348- */
349-
350- // wire [GPIOWidth-1:0] gpio1_data_fromhm3 = iodatafromhm3[1];
351- // wire [GPIOWidth-1:0] gpio1_out_data = {gpio1_data_fromhm3[GPIOWidth-1:5],4'bz,charge};
352- // wire [GPIOWidth-1:0] gpio1_input_data;
353- // assign gpio_input_data[1] = {gpio1_input_data[GPIOWidth-1:5],sense,charge};
354- generate if (Capsense >= 1 ) begin
355- bidir_io # (.IOWidth (GPIOWidth * NumGPIO),.PortNumWidth (PortNumWidth),.Mux_En (Mux_En)) bidir_io_inst
356- (
357- .clk (reg_clk),
358- .portselnum (portnumsel),
359- .out_ena ({ out_ena[1 ],out_ena[0 ]} ) , // input out_ena_sig
360- .od ({ od[1 ],od[0 ]} ) , // input od_sig
361- .out_data ({ iodatafromhm3[1 ][GPIOWidth- 1 : 5 ],4'bz ,charge, iodatafromhm3[0 ]} ) , // input [IOIOWidth-1:0] out_data_sig
362- .gpioport ({ gpioport[1 ],gpioport[0 ]} ) , // inout [IOIOWidth-1:0] gpioport_sig
363- .data_from_gpio ({ gpio_input_data[1 ],gpio_input_data[0 ]} ) // output [IOIOWidth-1:0] read_data_sig
364- );
365- end
366- else begin
367- bidir_io # (.IOWidth (GPIOWidth * NumGPIO),.PortNumWidth (PortNumWidth),.Mux_En (Mux_En)) bidir_io_inst
368- (
369- .clk (reg_clk),
370- .portselnum (portnumsel),
371- .out_ena ({ out_ena[1 ],out_ena[0 ]} ) , // input out_ena_sig
372- .od ({ od[1 ],od[0 ]} ) , // input od_sig
373- .out_data ({ iodatafromhm3[1 ], iodatafromhm3[0 ]} ) , // input [IOIOWidth-1:0] out_data_sig
374- .gpioport ({ gpioport[1 ],gpioport[0 ]} ) , // inout [IOIOWidth-1:0] gpioport_sig
375- .data_from_gpio ({ gpio_input_data[1 ],gpio_input_data[0 ]} ) // output [IOIOWidth-1:0] read_data_sig
376- );
377- end
378- endgenerate
379394 // Read:
380395
381396 integer oo,om,oi;
@@ -414,8 +429,8 @@ endgenerate
414429 else begin busdata_to_cpu <= busdata_fromhm2; end
415430 end else begin
416431 if (adc_address_valid) begin busdata_to_cpu <= adc_data_out; end
417- // if ((busaddress_r == 'h0200) || (busaddress_r == 'h0204)) begin busdata_to_cpu <= adc_data_out ; end
418- else if (busaddress_r == 'h0304 ) begin busdata_to_cpu <= hysteresis_reg; end
432+ // else if (busaddress_r == 'h0300) begin busdata_to_cpu <= touched; reset_init_sr <= 1'b1 ; end
433+ // else if (busaddress_r == 'h0304) begin busdata_to_cpu <= hysteresis_reg; end
419434 else if (busaddress_r == 'h1000 ) begin busdata_to_cpu <= { 8'b0 ,gpio_input_data[0 ][23 : 0 ]} ; end
420435 else if (busaddress_r == 'h1004 ) begin busdata_to_cpu <= { 8'b0 ,gpio_input_data[1 ][11 : 0 ],gpio_input_data[0 ][35 : 24 ]} ; end
421436 else if (busaddress_r == 'h1008 ) begin busdata_to_cpu <= { 8'b0 ,gpio_input_data[1 ][35 : 12 ]} ; end
@@ -442,30 +457,30 @@ endgenerate
442457 end
443458 endgenerate
444459
445- generate if (Capsense >= 1 ) begin
446- assign sense = gpio_input_data[1 ][5 : 1 ];
447-
448- capsense capsense_inst
449- (
450- .clk (reg_clk) , // input clk_sig
451- .reset (sense_reset) , // input reset_sig
452- .sense (sense) , // input [num-1:0] sense_sig
453- .hysteresis (hysteresis),
454- // .calibval_0(calibval_0),
455- // .counts_0(counts_0),
456- .charge (charge) , // output charge_sig
457- .touched (touched) // output [num-1:0] touched_sig
458- );
459-
460- defparam capsense_inst.num = NumSense;
461- // States
462- defparam capsense_inst.CHARGE = 1 ;
463- defparam capsense_inst.DISCHARGE = 2 ;
464- // freqwuency in Mhz , times in us
465- defparam capsense_inst.clockfrequency = 200 ;
466- defparam capsense_inst.periodtime = 5 ;
467- end
468- endgenerate
460+ generate if (Capsense >= 1 ) begin
461+ assign sense = gpio_input_data[1 ][5 : 1 ];
462+
463+ capsense capsense_inst
464+ (
465+ .clk (reg_clk) , // input clk_sig
466+ .reset (sense_reset) , // input reset_sig
467+ .sense (sense) , // input [num-1:0] sense_sig
468+ .hysteresis (hysteresis),
469+ // .calibval_0(calibval_0),
470+ // .counts_0(counts_0),
471+ .charge (charge) , // output charge_sig
472+ .touched (touched) // input [num-1:0] touched_sig
473+ );
474+
475+ defparam capsense_inst.num = NumSense;
476+ // States
477+ defparam capsense_inst.CHARGE = 1 ;
478+ defparam capsense_inst.DISCHARGE = 2 ;
479+ // freqwuency in Mhz , times in us
480+ defparam capsense_inst.clockfrequency = 200 ;
481+ defparam capsense_inst.periodtime = 5 ;
482+ end
483+ endgenerate
469484
470485endmodule
471486
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