arcv: fuse load-immediate with store

For the RMX-500 and RHX cores, the sequence "load-immediate + store" (that
is used to store a constant value) can be executed in 1 cycle, provided the two
instructions are kept next to one another. This patch handles this case in
riscv_macro_fusion_pair_p().

Signed-off-by: Artemiy Volkov <artemiy@synopsys.com>

Author: artemiy-volkov

gcc/config/riscv/riscv.cc

@@ -10489,6 +10489,16 @@ arcv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
 	return true;
     }
 
+  /* Fuse load-immediate with a store of the destination register.  */
+  if (get_attr_type (prev) == TYPE_MOVE
+      && get_attr_move_type (prev) == MOVE_TYPE_CONST
+      && get_attr_type (curr) == TYPE_STORE
+      && ((REG_P (SET_SRC (curr_set))
+	   && SET_DEST (prev_set) == SET_SRC (curr_set))
+	  || (SUBREG_P (SET_SRC (curr_set))
+	      && SET_DEST (prev_set) == SUBREG_REG (SET_SRC (curr_set)))))
+    return true;
+
   return false;
 }