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@rishabhroyy rishabhroyy commented Nov 20, 2025

Changes

Misc

  • Hide Digikey labels in stm32-test project schematic
  • Created CAN_TRANSCEIVER Design Block

Changed decoupling capacitor layout

  • Removed duplicate 10uF capacitors, reference schematic only has 1
  • Changed the layout/wiring of the capacitors
  • Added a 120 Ω @ 100Mhz Ferrite Bead from Digikey between VDD(s) and VDDA (the reference schematic from STM had it)
  • I'm 99% sure I did it right but I'd really appreciate it if you could double check it

Questions

  • I couldn't find a button that's exactly the same as ours, but I did find a similar one with J-leads that is 6mm by 6mm. Should I change it out?
  • "The unused clock source should be disabled and the unused I/Os should not be left floating. The unused I/O pins should be configured as analog input by software; they should also be connected to a fixed logic level 0 or 1 by an external or internal pull-up or pull-down or configured as output mode using software."
    • Should I do something about this? Like ground every unused pin?
  • "Might be worth including a solder bridge pad for a 0-ohm resister that ties it to ground in case we ever want to change that, but honestly I can't see us needing to."
    • It has a resistor to ground, so I'm guessing you mean solder pads for a resistor to +3V3, and I decided to not add it, because after reading the STM pdf I see why you said we'd probably never use it, so it'd probably be unnecessary, but if you actually want me to add it lmk.

@rishabhroyy rishabhroyy requested a review from bvngee November 20, 2025 09:39
@rishabhroyy rishabhroyy self-assigned this Nov 20, 2025
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2 participants