initial stm32u3 support #685
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You're right, I went back and looked at the other files, and they are like this. |
stm32-data-gen/src/interrupts.rs
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| ("TIM", &["BRK", "UP", "TRG", "COM", "CC"]), | ||
| ( | ||
| "TIM", | ||
| &["BRK_TERR_IERR", "BRK", "UP", "TRG", "TRG_COM_DIR_IDX", "COM", "CC"], |
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BRK_TERR_IERR, TRG_COM_DIR_IDX don't look like signal names. They're most likely a combination of multiple signals, where the signals are actually BRK, TERR, IERR, etc.
No idea what these are (TERR, IERR, DIR, IDX). Maybe they're something new in U3? If so we should ideally make it so they only appear in the U3 generated JSONs and not other families.
If you want to just those signals for now that's fine too, they can be added later when someone needs them.
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You're correct about them being a combination of signals. They are identical to the U5. Should I rename the interrupt name similar to how other typos are fixed in the process function?
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@Dirbaio I backed out that original code and now rename the divergent interrupt names. Let me know if this should be generalized or if this targeted rename is fine.
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nice!!
Yeah the rename is fine, the codebase is already full of similar renames 😅
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