Skip to content

Commit 53c04ff

Browse files
rmacnak-googleCommit Bot
authored andcommitted
[vm] More pieces of Windows ARM support.
TEST=ci Bug: #47824 Change-Id: Ie7388b12359b9ae11509a3f1b9e86c72507df38f Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/240483 Reviewed-by: Alexander Aprelev <aam@google.com> Commit-Queue: Ryan Macnak <rmacnak@google.com>
1 parent ca9ba19 commit 53c04ff

File tree

14 files changed

+67
-49
lines changed

14 files changed

+67
-49
lines changed

runtime/bin/ffi_test/ffi_test_functions_vmspecific.cc

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -185,7 +185,10 @@ DART_EXPORT void* TestUnprotectCode(void (*fn)(void)) {
185185
// Clobbers some registers with special meaning in Dart before re-entry, for
186186
// stress-testing. Not used on 32-bit Windows due to complications with Windows
187187
// "safeseh".
188-
#if defined(DART_TARGET_OS_WINDOWS) && defined(HOST_ARCH_IA32)
188+
// TODO(47824): Figure out how ARM/ARM64 syntax is different on Windows.
189+
#if defined(DART_TARGET_OS_WINDOWS) && \
190+
(defined(HOST_ARCH_IA32) || defined(HOST_ARCH_ARM) || \
191+
defined(HOST_ARCH_ARM64))
189192
void ClobberAndCall(void (*fn)()) {
190193
fn();
191194
}

runtime/third_party/double-conversion/src/utils.h

Lines changed: 15 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -67,16 +67,22 @@ inline void abort_noreturn() { abort(); }
6767
// the output of the division with the expected result. (Inlining must be
6868
// disabled.)
6969
// On Linux,x86 89255e-22 != Div_double(89255.0/1e22)
70-
#if defined(_M_X64) || defined(__x86_64__) || defined(__ARMEL__) || \
71-
defined(__avr32__) || defined(__hppa__) || defined(__ia64__) || \
72-
defined(__mips__) || defined(__powerpc__) || defined(__ppc__) || \
73-
defined(__ppc64__) || defined(_POWER) || defined(_ARCH_PPC) || \
74-
defined(_ARCH_PPC64) || defined(__sparc__) || defined(__sparc) || \
75-
defined(__s390__) || defined(__SH4__) || defined(__alpha__) || \
76-
defined(_MIPS_ARCH_MIPS32R2) || defined(__AARCH64EL__) || \
77-
defined(__aarch64__) || defined(__riscv)
70+
#if defined(_M_X64) || defined(__x86_64__) || \
71+
defined(__ARMEL__) || defined(__avr32__) || defined(_M_ARM) || defined(_M_ARM64) || \
72+
defined(__hppa__) || defined(__ia64__) || \
73+
defined(__mips__) || \
74+
defined(__powerpc__) || defined(__ppc__) || defined(__ppc64__) || \
75+
defined(_POWER) || defined(_ARCH_PPC) || defined(_ARCH_PPC64) || \
76+
defined(__sparc__) || defined(__sparc) || defined(__s390__) || \
77+
defined(__SH4__) || defined(__alpha__) || \
78+
defined(_MIPS_ARCH_MIPS32R2) || \
79+
defined(__AARCH64EL__) || defined(__aarch64__) || defined(__AARCH64EB__) || \
80+
defined(__riscv) || \
81+
defined(__or1k__) || defined(__arc__) || \
82+
defined(__EMSCRIPTEN__)
7883
#define DOUBLE_CONVERSION_CORRECT_DOUBLE_OPERATIONS 1
79-
#elif defined(__mc68000__)
84+
#elif defined(__mc68000__) || \
85+
defined(__pnacl__) || defined(__native_client__)
8086
#undef DOUBLE_CONVERSION_CORRECT_DOUBLE_OPERATIONS
8187
#elif defined(_M_IX86) || defined(__i386__) || defined(__i386)
8288
#if defined(_WIN32)

runtime/vm/compiler/assembler/assembler_arm.cc

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -271,7 +271,7 @@ void Assembler::bics(Register rd, Register rn, Operand o, Condition cond) {
271271
EmitType01(cond, o.type(), BIC, 1, rn, rd, o);
272272
}
273273

274-
void Assembler::mvn(Register rd, Operand o, Condition cond) {
274+
void Assembler::mvn_(Register rd, Operand o, Condition cond) {
275275
EmitType01(cond, o.type(), MVN, 0, R0, rd, o);
276276
}
277277

@@ -2779,7 +2779,7 @@ void Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) {
27792779
if (Operand::CanHold(value, &o)) {
27802780
mov(rd, o, cond);
27812781
} else if (Operand::CanHold(~value, &o)) {
2782-
mvn(rd, o, cond);
2782+
mvn_(rd, o, cond);
27832783
} else {
27842784
LoadDecodableImmediate(rd, value, cond);
27852785
}
@@ -3072,10 +3072,10 @@ void Assembler::AddImmediate(Register rd,
30723072
} else {
30733073
ASSERT(rn != IP);
30743074
if (Operand::CanHold(~value, &o)) {
3075-
mvn(IP, o, cond);
3075+
mvn_(IP, o, cond);
30763076
add(rd, rn, Operand(IP), cond);
30773077
} else if (Operand::CanHold(~(-value), &o)) {
3078-
mvn(IP, o, cond);
3078+
mvn_(IP, o, cond);
30793079
sub(rd, rn, Operand(IP), cond);
30803080
} else if (value > 0) {
30813081
LoadDecodableImmediate(IP, value, cond);
@@ -3101,11 +3101,11 @@ void Assembler::AddImmediateSetFlags(Register rd,
31013101
} else {
31023102
ASSERT(rn != IP);
31033103
if (Operand::CanHold(~value, &o)) {
3104-
mvn(IP, o, cond);
3104+
mvn_(IP, o, cond);
31053105
adds(rd, rn, Operand(IP), cond);
31063106
} else if (Operand::CanHold(~(-value), &o)) {
31073107
ASSERT(value != kMinInt32); // Would cause erroneous overflow detection.
3108-
mvn(IP, o, cond);
3108+
mvn_(IP, o, cond);
31093109
subs(rd, rn, Operand(IP), cond);
31103110
} else {
31113111
LoadDecodableImmediate(IP, value, cond);
@@ -3135,11 +3135,11 @@ void Assembler::SubImmediateSetFlags(Register rd,
31353135
} else {
31363136
ASSERT(rn != IP);
31373137
if (Operand::CanHold(~value, &o)) {
3138-
mvn(IP, o, cond);
3138+
mvn_(IP, o, cond);
31393139
subs(rd, rn, Operand(IP), cond);
31403140
} else if (Operand::CanHold(~(-value), &o)) {
31413141
ASSERT(value != kMinInt32); // Would cause erroneous overflow detection.
3142-
mvn(IP, o, cond);
3142+
mvn_(IP, o, cond);
31433143
adds(rd, rn, Operand(IP), cond);
31443144
} else {
31453145
LoadDecodableImmediate(IP, value, cond);

runtime/vm/compiler/assembler/assembler_arm.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -500,7 +500,7 @@ class Assembler : public AssemblerBase {
500500
void bic(Register rd, Register rn, Operand o, Condition cond = AL);
501501
void bics(Register rd, Register rn, Operand o, Condition cond = AL);
502502

503-
void mvn(Register rd, Operand o, Condition cond = AL);
503+
void mvn_(Register rd, Operand o, Condition cond = AL);
504504
void mvns(Register rd, Operand o, Condition cond = AL);
505505

506506
// Miscellaneous data-processing instructions.

runtime/vm/compiler/assembler/assembler_arm64.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1586,7 +1586,9 @@ class Assembler : public AssemblerBase {
15861586
}
15871587
}
15881588
void vmov(VRegister vd, VRegister vn) { vorr(vd, vn, vn); }
1589-
void mvn(Register rd, Register rm) { orn(rd, ZR, Operand(rm)); }
1589+
void mvn_(Register rd, Register rm) {
1590+
orn(rd, ZR, Operand(rm));
1591+
}
15901592
void mvnw(Register rd, Register rm) { ornw(rd, ZR, Operand(rm)); }
15911593
void neg(Register rd, Register rm) { sub(rd, ZR, Operand(rm)); }
15921594
void negs(Register rd, Register rm, OperandSize sz = kEightBytes) {

runtime/vm/compiler/assembler/assembler_arm64_test.cc

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3258,8 +3258,7 @@ ASSEMBLER_TEST_GENERATE(Smaddl3, assembler) {
32583258

32593259
ASSEMBLER_TEST_RUN(Smaddl3, test) {
32603260
typedef int64_t (*Int64Return)() DART_UNUSED;
3261-
EXPECT_EQ(0xffffl * 0xffffl,
3262-
EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
3261+
EXPECT_EQ(0xfffe0001, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry()));
32633262
EXPECT_DISASSEMBLY(
32643263
"movz r1, #0xffff\n"
32653264
"movz r2, #0xffff\n"

runtime/vm/compiler/assembler/assembler_arm_test.cc

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ ASSEMBLER_TEST_RUN(Simple, test) {
7575
}
7676

7777
ASSEMBLER_TEST_GENERATE(MoveNegated, assembler) {
78-
__ mvn(R0, Operand(42));
78+
__ mvn_(R0, Operand(42));
7979
__ Ret();
8080
}
8181

@@ -988,7 +988,7 @@ ASSEMBLER_TEST_GENERATE(Clz, assembler) {
988988
__ clz(R2, R2);
989989
__ cmp(R2, Operand(26));
990990
__ b(&error, NE);
991-
__ mvn(R0, Operand(0));
991+
__ mvn_(R0, Operand(0));
992992
__ clz(R1, R0);
993993
__ cmp(R1, Operand(0));
994994
__ b(&error, NE);

runtime/vm/compiler/backend/il_arm.cc

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5786,7 +5786,7 @@ void UnarySmiOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
57865786
break;
57875787
}
57885788
case Token::kBIT_NOT:
5789-
__ mvn(result, compiler::Operand(value));
5789+
__ mvn_(result, compiler::Operand(value));
57905790
// Remove inverted smi-tag.
57915791
__ bic(result, result, compiler::Operand(kSmiTagMask));
57925792
break;
@@ -7071,8 +7071,8 @@ void UnaryInt64OpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
70717071

70727072
switch (op_kind()) {
70737073
case Token::kBIT_NOT:
7074-
__ mvn(out_lo, compiler::Operand(left_lo));
7075-
__ mvn(out_hi, compiler::Operand(left_hi));
7074+
__ mvn_(out_lo, compiler::Operand(left_lo));
7075+
__ mvn_(out_hi, compiler::Operand(left_hi));
70767076
break;
70777077
case Token::kNEGATE:
70787078
__ rsbs(out_lo, left_lo, compiler::Operand(0));
@@ -7143,7 +7143,7 @@ void UnaryUint32OpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
71437143

71447144
ASSERT(op_kind() == Token::kBIT_NOT);
71457145

7146-
__ mvn(out, compiler::Operand(left));
7146+
__ mvn_(out, compiler::Operand(left));
71477147
}
71487148

71497149
LocationSummary* IntConverterInstr::MakeLocationSummary(Zone* zone,

runtime/vm/compiler/backend/il_arm64.cc

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4832,7 +4832,7 @@ void UnarySmiOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
48324832
break;
48334833
}
48344834
case Token::kBIT_NOT:
4835-
__ mvn(result, value);
4835+
__ mvn_(result, value);
48364836
// Remove inverted smi-tag.
48374837
__ andi(result, result, compiler::Immediate(~kSmiTagMask));
48384838
break;
@@ -6145,7 +6145,7 @@ void UnaryInt64OpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
61456145
const Register out = locs()->out(0).reg();
61466146
switch (op_kind()) {
61476147
case Token::kBIT_NOT:
6148-
__ mvn(out, left);
6148+
__ mvn_(out, left);
61496149
break;
61506150
case Token::kNEGATE:
61516151
__ sub(out, ZR, compiler::Operand(left));

runtime/vm/cpu_arm.cc

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -14,15 +14,12 @@
1414
#include "vm/object.h"
1515
#include "vm/simulator.h"
1616

17-
#if defined(DART_HOST_OS_IOS)
17+
#if !defined(TARGET_HOST_MISMATCH)
18+
#if defined(DART_HOST_OS_MACOS) || defined(DART_HOST_OS_IOS)
1819
#include <libkern/OSCacheControl.h>
1920
#elif defined(DART_HOST_OS_WINDOWS)
2021
#include <processthreadsapi.h>
2122
#endif
22-
23-
#if !defined(TARGET_HOST_MISMATCH)
24-
#include <sys/syscall.h> /* NOLINT */
25-
#include <unistd.h> /* NOLINT */
2623
#endif
2724

2825
// ARM version differences.

0 commit comments

Comments
 (0)