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Merge: cxl: core/region - ignore interleave granularity when ways=1
MR: https://gitlab.com/redhat/rhel/src/kernel/rhel-10/-/merge_requests/285 When validating decoder IW/IG when setting up regions, the granularity is irrelevant when iw=1 - all accesses will always route to the only target anyway - so all ig values are "correct". Loosen the requirement that ig = (parent_iw * parent_ig) when iw=1. On some Zen5 platforms, the platform BIOS specifies a 256-byte interleave granularity window for host bridges when there is only one target downstream. This leads to Linux rejecting the configuration of a region with a x2 root with two x1 hostbridges. Decoder Programming: root - iw:2 ig:256 hb1 - iw:1 ig:256 (Linux expects 512) hb2 - iw:1 ig:256 (Linux expects 512) ep1 - iw:2 ig:256 ep2 - iw:2 ig:256 This change allows all decoders downstream of a passthrough decoder to also be configured as passthrough (iw:1 ig:X), but still disallows downstream decoders from applying subsequent interleaves. e.g. in the above example if there was another decoder south of hb1 attempting to interleave 2 endpoints - Linux would enforce hb1.ig=512 because the southern decoder would have iw:2 and require ig=pig*piw. Approved Development Ticket(s) JIRA: https://issues.redhat.com/browse/RHEL-107880 Resolves: RHEL-107880 Signed-off-by: John W. Linville <linville@redhat.com> Approved-by: Tony Camuso <tcamuso@redhat.com> Approved-by: Charles Mirabile <cmirabil@redhat.com> Approved-by: CKI KWF Bot <cki-ci-bot+kwf-gitlab-com@redhat.com> Approved-by: Myron Stowe <mstowe@redhat.com> Merged-by: Julio Faracco <jfaracco@redhat.com>
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drivers/cxl/core/region.c

Lines changed: 1 addition & 1 deletion
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@@ -1423,7 +1423,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
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if (test_bit(CXL_REGION_F_AUTO, &cxlr->flags)) {
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if (cxld->interleave_ways != iw ||
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cxld->interleave_granularity != ig ||
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(iw > 1 && cxld->interleave_granularity != ig) ||
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cxld->hpa_range.start != p->res->start ||
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cxld->hpa_range.end != p->res->end ||
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((cxld->flags & CXL_DECODER_F_ENABLE) == 0)) {

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