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The exmple in README is updated.
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README.md

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,6 @@ Let's begin veriloggen by an example. Create a example Python script in Python a
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```python
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import sys
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import os
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from veriloggen import *
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def mkLed():
@@ -92,14 +91,14 @@ def mkLed():
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m.Always(Posedge(clk))(
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If(rst)(
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count(0)
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).els(
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).Else(
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count(count + 1)
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))
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m.Always(Posedge(clk))(
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If(rst)(
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led(0)
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).els(
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).Else(
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If(count == 1024 - 1)(
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led(led + 1)
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)
@@ -108,7 +107,7 @@ def mkLed():
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return m
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led = mkLed()
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verilog = led.toVerilog()
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verilog = led.to_verilog()
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print(verilog)
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```
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README.rst

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -92,7 +92,6 @@ Python as below. A blinking LED hardware is modeled in Python.
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import sys
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import os
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from veriloggen import *
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def mkLed():
@@ -106,14 +105,14 @@ Python as below. A blinking LED hardware is modeled in Python.
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m.Always(Posedge(clk))(
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If(rst)(
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count(0)
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).els(
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).Else(
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count(count + 1)
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))
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m.Always(Posedge(clk))(
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If(rst)(
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led(0)
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).els(
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).Else(
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If(count == 1024 - 1)(
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led(led + 1)
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)
@@ -122,7 +121,7 @@ Python as below. A blinking LED hardware is modeled in Python.
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return m
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led = mkLed()
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verilog = led.toVerilog()
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verilog = led.to_verilog()
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print(verilog)
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Run the script.

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