Links in README are updated.

shtaxxx · shtaxxx · commit 400f2a0811cb · 2015-08-19T02:38:49.000+09:00
diff --git a/README.md b/README.md
@@ -179,5 +179,5 @@ Not yet.
 Related Project
 ==============================
 
-[Pyverilog](https://github.com/shtaxxx/Pyverilog)
+[Pyverilog](https://github.com/Pyverilog/Pyverilog)
 - Python-based Hardware Design Processing Toolkit for Verilog HDL
