dsjkjsg

Author: wig-nesh

pipelined/testcases/3.s

@@ -1,8 +1,5 @@
 begin:
-    addi x4, x5, 1
-    addi x8, x0, 0
-    addi x8, x0, 0
-    beq x1, x4, L1
+    beq x0, x0, L1
     addi x6, x0, 3
 
 L1:

pipelined/testcases/4.s

@@ -0,0 +1,14 @@
+begin:
+    beq x0, x0, end
+
+L1:
+    addi x5, x0, 4
+
+L2:
+    addi x6, x0, 4
+
+L3:
+    addi x7, x0, 4
+
+end:
+    nop

pipelined/verilog/testbench_pipelined.v

@@ -16,13 +16,11 @@ module testbench_pipelined();
         reset = 1;
 
         // Initialize instruction memory first
-        cpu.imem.memory[0] = 32'b00000000000100101000001000010011;
-        cpu.imem.memory[1] = 32'b00000000000000000000010000010011;
-        cpu.imem.memory[2] = 32'b00000000000000000000010000010011;
-        cpu.imem.memory[3] = 32'b00000000010000001000010001100011;
-        cpu.imem.memory[4] = 32'b00000000001100000000001100010011;
-        cpu.imem.memory[5] = 32'b00000000010000000000001010010011;
-        cpu.imem.memory[6] = 32'b00000000000000000000000000000000;
+        cpu.imem.memory[0] = 32'b00000000000000000000100001100011;
+        cpu.imem.memory[1] = 32'b00000000010000000000001010010011;
+        cpu.imem.memory[2] = 32'b00000000010000000000001100010011;
+        cpu.imem.memory[3] = 32'b00000000010000000000001110010011;
+        cpu.imem.memory[4] = 32'b00000000000000000000000000000000;
 
         // promper initialization
         #10 reset = 0;

sequential/testcases/8.s

@@ -0,0 +1,14 @@
+begin:
+    beq x0, x0, end
+
+L1:
+    addi x5, x0, 4
+
+L2:
+    addi x6, x0, 4
+
+L3:
+    addi x7, x0, 4
+
+end:
+    nop

sequential/verilog/testbench_sequential.v

@@ -1,4 +1,4 @@
-`timescale 1ns/1ps
+nb`timescale 1ns/1ps
 
 module testbench_sequential();
     reg clk;
@@ -26,13 +26,11 @@ module testbench_sequential();
     );
 
     initial begin
-        cpu.imem.memory[0] = 32'b00000000001100000000000010010011;
-        cpu.imem.memory[1] = 32'b00000000011100000000000100010011;
-        cpu.imem.memory[2] = 32'b00000000000000001000100001100011;
-        cpu.imem.memory[3] = 32'b00000000000100010000000100110011;
-        cpu.imem.memory[4] = 32'b11111111111100001000000010010011;
-        cpu.imem.memory[5] = 32'b11111110000000000000101011100011;
-        cpu.imem.memory[6] = 32'b00000000000000000000000000000000;
+        cpu.imem.memory[0] = 32'b00000000000000000000100001100011;
+        cpu.imem.memory[1] = 32'b00000000010000000000001010010011;
+        cpu.imem.memory[2] = 32'b00000000010000000000001100010011;
+        cpu.imem.memory[3] = 32'b00000000010000000000001110010011;
+        cpu.imem.memory[4] = 32'b00000000000000000000000000000000;
     end