software: constrain the alignment of memory-mapped registers.

Otherwise, GCC/Clang will serialize 32-bit accesses as four 8-bit
instructions. Clang will schedule them in descending order, which
violates the SoC memory model (Amaranth SoC CSRs must be accessed
in ascending order of addresses).

Author: jfng

chipflow_lib/software/drivers/gpio.h

@@ -4,7 +4,7 @@
 
 #include <stdint.h>
 
-typedef struct __attribute__((packed)) {
+typedef struct __attribute__((packed, aligned(4))) {
 	uint32_t out;
 	uint32_t oe;
 	uint32_t in;

chipflow_lib/software/drivers/plat_timer.h

@@ -4,7 +4,7 @@
 
 #include <stdint.h>
 
-typedef struct __attribute__((packed)) {
+typedef struct __attribute__((packed, aligned(4))) {
 	uint32_t cnt_lo;
 	uint32_t cnt_hi;
 	uint32_t cmp_lo;

chipflow_lib/software/drivers/soc_id.h

@@ -4,7 +4,7 @@
 
 #include <stdint.h>
 
-typedef struct __attribute__((packed)) {
+typedef struct __attribute__((packed, aligned(4))) {
 	uint32_t type;
 	uint32_t version;
 } soc_id_regs_t;

chipflow_lib/software/drivers/spiflash.h

@@ -7,7 +7,7 @@
 #define WINBOND_ID 0x40
 #define ISSI_ID 0x60
 
-typedef struct __attribute__((packed)) {
+typedef struct __attribute__((packed, aligned(4))) {
 	uint32_t ctrl;
 } spiflash_regs_t;
 

chipflow_lib/software/drivers/uart.h

@@ -4,7 +4,7 @@
 
 #include <stdint.h>
 
-typedef struct __attribute__((packed)) {
+typedef struct __attribute__((packed, aligned(4))) {
 	uint32_t tx_data;
 	uint32_t rx_data;
 	uint32_t tx_ready;