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Sadik.OzerSadik.Ozer
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Remove __R because of confliction
Signed-off-by: Sadik.Ozer <Sadik.Ozer@maximintegrated.com>
1 parent fc90e9a commit f40887a

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23 files changed

+29
-98
lines changed

23 files changed

+29
-98
lines changed

targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/aes_key_regs.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -67,9 +67,6 @@ extern "C" {
6767
#ifndef __O
6868
#define __O volatile
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#endif
70-
#ifndef __R
71-
#define __R volatile const
72-
#endif
7370
/// @endcond
7471

7572
/* **** Definitions **** */

targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/aes_regs.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
70-
#ifndef __R
71-
#define __R volatile const
72-
#endif
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/// @endcond
7471

7572
/* **** Definitions **** */

targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/crc_regs.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
70-
#ifndef __R
71-
#define __R volatile const
72-
#endif
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/// @endcond
7471

7572
/* **** Definitions **** */

targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/dma_regs.h

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
70-
#ifndef __R
71-
#define __R volatile const
72-
#endif
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/// @endcond
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/* **** Definitions **** */
@@ -103,7 +100,7 @@ typedef struct {
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typedef struct {
104101
__IO uint32_t inten; /**< <tt>\b 0x000:</tt> DMA INTEN Register */
105102
__I uint32_t intfl; /**< <tt>\b 0x004:</tt> DMA INTFL Register */
106-
__R uint32_t rsv_0x8_0xff[62];
103+
__I uint32_t rsv_0x8_0xff[62];
107104
__IO mxc_dma_ch_regs_t ch[8]; /**< <tt>\b 0x100:</tt> DMA CH Register */
108105
} mxc_dma_regs_t;
109106

targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/ecc_regs.h

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
70-
#ifndef __R
71-
#define __R volatile const
72-
#endif
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/// @endcond
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/* **** Definitions **** */
@@ -86,7 +83,7 @@ extern "C" {
8683
* Structure type to access the ECC Registers.
8784
*/
8885
typedef struct {
89-
__R uint32_t rsv_0x0_0x7[2];
86+
__I uint32_t rsv_0x0_0x7[2];
9087
__IO uint32_t en; /**< <tt>\b 0x08:</tt> ECC EN Register */
9188
} mxc_ecc_regs_t;
9289

targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/emcc_regs.h

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
70-
#ifndef __R
71-
#define __R volatile const
72-
#endif
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/// @endcond
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/* **** Definitions **** */
@@ -88,9 +85,9 @@ extern "C" {
8885
typedef struct {
8986
__I uint32_t cache_id; /**< <tt>\b 0x0000:</tt> EMCC CACHE_ID Register */
9087
__I uint32_t memcfg; /**< <tt>\b 0x0004:</tt> EMCC MEMCFG Register */
91-
__R uint32_t rsv_0x8_0xff[62];
88+
__I uint32_t rsv_0x8_0xff[62];
9289
__IO uint32_t cache_ctrl; /**< <tt>\b 0x0100:</tt> EMCC CACHE_CTRL Register */
93-
__R uint32_t rsv_0x104_0x6ff[383];
90+
__I uint32_t rsv_0x104_0x6ff[383];
9491
__IO uint32_t invalidate; /**< <tt>\b 0x0700:</tt> EMCC INVALIDATE Register */
9592
} mxc_emcc_regs_t;
9693

targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/fcr_regs.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
70-
#ifndef __R
71-
#define __R volatile const
72-
#endif
7370
/// @endcond
7471

7572
/* **** Definitions **** */

targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/flc_regs.h

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
6868
#define __O volatile
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#endif
70-
#ifndef __R
71-
#define __R volatile const
72-
#endif
7370
/// @endcond
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7572
/* **** Definitions **** */
@@ -89,19 +86,19 @@ typedef struct {
8986
__IO uint32_t addr; /**< <tt>\b 0x00:</tt> FLC ADDR Register */
9087
__IO uint32_t clkdiv; /**< <tt>\b 0x04:</tt> FLC CLKDIV Register */
9188
__IO uint32_t ctrl; /**< <tt>\b 0x08:</tt> FLC CTRL Register */
92-
__R uint32_t rsv_0xc_0x23[6];
89+
__I uint32_t rsv_0xc_0x23[6];
9390
__IO uint32_t intr; /**< <tt>\b 0x024:</tt> FLC INTR Register */
9491
__IO uint32_t eccdata; /**< <tt>\b 0x028:</tt> FLC ECCDATA Register */
95-
__R uint32_t rsv_0x2c;
92+
__I uint32_t rsv_0x2c;
9693
__IO uint32_t data[4]; /**< <tt>\b 0x30:</tt> FLC DATA Register */
9794
__O uint32_t actrl; /**< <tt>\b 0x40:</tt> FLC ACTRL Register */
98-
__R uint32_t rsv_0x44_0x7f[15];
95+
__I uint32_t rsv_0x44_0x7f[15];
9996
__IO uint32_t welr0; /**< <tt>\b 0x80:</tt> FLC WELR0 Register */
100-
__R uint32_t rsv_0x84;
97+
__I uint32_t rsv_0x84;
10198
__IO uint32_t welr1; /**< <tt>\b 0x88:</tt> FLC WELR1 Register */
102-
__R uint32_t rsv_0x8c;
99+
__I uint32_t rsv_0x8c;
103100
__IO uint32_t rlr0; /**< <tt>\b 0x90:</tt> FLC RLR0 Register */
104-
__R uint32_t rsv_0x94;
101+
__I uint32_t rsv_0x94;
105102
__IO uint32_t rlr1; /**< <tt>\b 0x98:</tt> FLC RLR1 Register */
106103
} mxc_flc_regs_t;
107104

targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/gcfr_regs.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
70-
#ifndef __R
71-
#define __R volatile const
72-
#endif
7370
/// @endcond
7471

7572
/* **** Definitions **** */

targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/gcr_regs.h

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -67,9 +67,6 @@ extern "C" {
6767
#ifndef __O
6868
#define __O volatile
6969
#endif
70-
#ifndef __R
71-
#define __R volatile const
72-
#endif
7370
/// @endcond
7471

7572
/* **** Definitions **** */
@@ -90,20 +87,20 @@ typedef struct {
9087
__IO uint32_t rst0; /**< <tt>\b 0x04:</tt> GCR RST0 Register */
9188
__IO uint32_t clkctrl; /**< <tt>\b 0x08:</tt> GCR CLKCTRL Register */
9289
__IO uint32_t pm; /**< <tt>\b 0x0C:</tt> GCR PM Register */
93-
__R uint32_t rsv_0x10_0x17[2];
90+
__I uint32_t rsv_0x10_0x17[2];
9491
__IO uint32_t pclkdiv; /**< <tt>\b 0x18:</tt> GCR PCLKDIV Register */
95-
__R uint32_t rsv_0x1c_0x23[2];
92+
__I uint32_t rsv_0x1c_0x23[2];
9693
__IO uint32_t pclkdis0; /**< <tt>\b 0x24:</tt> GCR PCLKDIS0 Register */
9794
__IO uint32_t memctrl; /**< <tt>\b 0x28:</tt> GCR MEMCTRL Register */
9895
__IO uint32_t memz; /**< <tt>\b 0x2C:</tt> GCR MEMZ Register */
99-
__R uint32_t rsv_0x30_0x3f[4];
96+
__I uint32_t rsv_0x30_0x3f[4];
10097
__IO uint32_t sysst; /**< <tt>\b 0x40:</tt> GCR SYSST Register */
10198
__IO uint32_t rst1; /**< <tt>\b 0x44:</tt> GCR RST1 Register */
10299
__IO uint32_t pclkdis1; /**< <tt>\b 0x48:</tt> GCR PCLKDIS1 Register */
103100
__IO uint32_t eventen; /**< <tt>\b 0x4C:</tt> GCR EVENTEN Register */
104101
__I uint32_t revision; /**< <tt>\b 0x50:</tt> GCR REVISION Register */
105102
__IO uint32_t sysie; /**< <tt>\b 0x54:</tt> GCR SYSIE Register */
106-
__R uint32_t rsv_0x58_0x63[3];
103+
__I uint32_t rsv_0x58_0x63[3];
107104
__IO uint32_t eccerr; /**< <tt>\b 0x64:</tt> GCR ECCERR Register */
108105
__IO uint32_t eccced; /**< <tt>\b 0x68:</tt> GCR ECCCED Register */
109106
__IO uint32_t eccie; /**< <tt>\b 0x6C:</tt> GCR ECCIE Register */

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