Merge pull request #10019 from deepikabhavnani/uarm_fix

0xc0170 · web-flow · commit b6a2c7b63fcf · 2019-04-18T12:49:56.000+01:00
uARM - Move heap region after IRAM1
diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_301/LPC11U24.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_301/LPC11U24.sct
@@ -40,11 +40,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
-  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
-   .ANY (USBRAM)
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
+   .ANY (USBRAM)
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_401/LPC11U24.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_401/LPC11U24.sct
@@ -40,11 +40,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
-  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
-   .ANY (USBRAM)
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
+   .ANY (USBRAM)
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/LPC11U34.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/LPC11U34.sct
@@ -39,14 +39,14 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
   RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE)  {  ; RW data
    .ANY (+RW +ZI)
   }
-  
-  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
-   .ANY (USBRAM)
-  }
 
   ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
+  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
+   .ANY (USBRAM)
+  }
+
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
   }
 }
diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U35_401/LPC11U35.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U35_401/LPC11U35.sct
@@ -39,14 +39,14 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
   RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE)  {  ; RW data
    .ANY (+RW +ZI)
   }
-  
-  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
-   .ANY (USBRAM)
-  }
 
   ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
+  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
+   .ANY (USBRAM)
+  }
+
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
   }
 }
diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/LPC11U37.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/LPC11U37.sct
@@ -40,6 +40,9 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  }
+
   RW_IRAM2 0x20000000 0x800   { ; RW data, I/O Handler RAM
    .ANY (IOHANDLER_RAM)
   }
@@ -48,9 +51,6 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (USBRAM)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
-  }
-
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
   }
 }
diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37_501/LPC11U37.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37_501/LPC11U37.sct
@@ -40,6 +40,9 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  }
+
   RW_IRAM2 0x20000000 0x800   { ; RW data, I/O Handler RAM
    .ANY (IOHANDLER_RAM)
   }
@@ -48,9 +51,6 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (USBRAM)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
-  }
-
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
   }
 }
diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_MCU_LPC11U35_501/LPC11U35.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_MCU_LPC11U35_501/LPC11U35.sct
@@ -40,6 +40,9 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  }
+
   RW_IRAM2 0x20000000 0x800   { ; RW data, I/O Handler RAM
    .ANY (IOHANDLER_RAM)
   }
@@ -48,9 +51,6 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (USBRAM)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
-  }
-
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
   }
 }
diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_OC_MBUINO/LPC11U24.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_OC_MBUINO/LPC11U24.sct
@@ -40,11 +40,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
-  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
-   .ANY (USBRAM)
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
+   .ANY (USBRAM)
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/LPC11C24.sct b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/LPC11C24.sct
@@ -40,13 +40,13 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  }
+  
   RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
    .ANY (USBRAM)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
-  }
-
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
   }
 }
diff --git a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_MICRO/LPC1347.sct b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_MICRO/LPC1347.sct
@@ -40,6 +40,9 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  }
+
   RW_IRAM2 0x20000000 0x800   { ; RW data, I/O Handler RAM
    .ANY (AHBSRAM0)
   }
@@ -48,9 +51,6 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (AHBSRAM1)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
-  }
-
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
   }
 }
diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/LPC1768.sct b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/LPC1768.sct
@@ -49,6 +49,9 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  }
+
   RW_IRAM2 0x2007C000 0x4000  {  ; RW data, USB RAM
    .ANY (AHBSRAM0)
   }
@@ -61,9 +64,6 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (CANRAM)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
-  }
-
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
   }
 }
diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_MICRO/STM32F407xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_MICRO/STM32F407xx.sct
@@ -43,11 +43,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
-  RW_IRAM2  MBED_RAM2_START  MBED_RAM2_SIZE  {  ; CCM
-   .ANY (CCMRAM)
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  RW_IRAM2  MBED_RAM2_START  MBED_RAM2_SIZE  {  ; CCM
+   .ANY (CCMRAM)
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/stm32f439xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/stm32f439xx.sct
@@ -79,11 +79,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
-  RW_IRAM2  MBED_RAM2_START  MBED_RAM2_SIZE  {
-   .ANY (+RW +ZI) 
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  RW_IRAM2  MBED_RAM2_START  MBED_RAM2_SIZE  {
+   .ANY (+RW +ZI) 
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_MICRO/stm32l471xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_MICRO/stm32l471xx.sct
@@ -73,14 +73,14 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
   RW_IRAM1  MBED_RAM_START  MBED_RAM_SIZE  { 
    .ANY (+RW +ZI)
   }
- 
-  RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_START-MBED_RAM2_SIZE)  {
-   .ANY (+RW +ZI)
-  }
 
   ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
+  RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_START-MBED_RAM2_SIZE)  {
+   .ANY (+RW +ZI)
+  }
+
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
   }
 }
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/stm32l475xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/stm32l475xx.sct
@@ -79,11 +79,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
-  RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE)  {
-   .ANY (+RW +ZI)
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE)  {
+   .ANY (+RW +ZI)
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct
@@ -79,11 +79,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
-  RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE)  {
-   .ANY (+RW +ZI)
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE)  {
+   .ANY (+RW +ZI)
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_MICRO/stm32l486xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_MICRO/stm32l486xx.sct
@@ -79,11 +79,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RW +ZI)
   }
 
-  RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE)  {
-   .ANY (+RW +ZI)
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE)  {
+   .ANY (+RW +ZI)
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack

Original file line number	Diff line number	Diff line change
`@@ -40,11 +40,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region`
`40`	`40`	`.ANY (+RW +ZI)`
`41`	`41`	`}`
`42`	`42`
`43`		`- RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM`
`44`		`- .ANY (USBRAM)`
	`43`	`+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
`45`	`44`	`}`
`46`	`45`
`47`		`- ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
	`46`	`+ RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM`
	`47`	`+ .ANY (USBRAM)`
`48`	`48`	`}`
`49`	`49`
`50`	`50`	`ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack`
Original file line number	Diff line number	Diff line change
`@@ -39,14 +39,14 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region`
`39`	`39`	`RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data`
`40`	`40`	`.ANY (+RW +ZI)`
`41`	`41`	`}`
`42`		`-`
`43`		`- RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM`
`44`		`- .ANY (USBRAM)`
`45`		`- }`
`46`	`42`
`47`	`43`	`ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
`48`	`44`	`}`
`49`	`45`
	`46`	`+ RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM`
	`47`	`+ .ANY (USBRAM)`
	`48`	`+ }`
	`49`	`+`
`50`	`50`	`ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack`
`51`	`51`	`}`
`52`	`52`	`}`
Original file line number	Diff line number	Diff line change
`@@ -40,6 +40,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region`
`40`	`40`	`.ANY (+RW +ZI)`
`41`	`41`	`}`
`42`	`42`
	`43`	`+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
	`44`	`+ }`
	`45`	`+`
`43`	`46`	`RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM`
`44`	`47`	`.ANY (IOHANDLER_RAM)`
`45`	`48`	`}`
`@@ -48,9 +51,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region`
`48`	`51`	`.ANY (USBRAM)`
`49`	`52`	`}`
`50`	`53`
`51`		`- ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
`52`		`- }`
`53`		`-`
`54`	`54`	`ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack`
`55`	`55`	`}`
`56`	`56`	`}`
Original file line number	Diff line number	Diff line change
`@@ -40,13 +40,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region`
`40`	`40`	`.ANY (+RW +ZI)`
`41`	`41`	`}`
`42`	`42`
	`43`	`+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
	`44`	`+ }`
	`45`	`+`
`43`	`46`	`RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM`
`44`	`47`	`.ANY (USBRAM)`
`45`	`48`	`}`
`46`	`49`
`47`		`- ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
`48`		`- }`
`49`		`-`
`50`	`50`	`ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack`
`51`	`51`	`}`
`52`	`52`	`}`