Merge pull request #10413 from kfnta/cy_rollup

Cypress PSoC6 rollup PR

Author: 0xc0170

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C62XX/TARGET_MCU_PSOC6_M0/system_psoc6_cm0plus_flash_init.c

@@ -1,10 +1,10 @@
-#! armcc -E
+#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m4
 ; The first line specifies a preprocessor command that the linker invokes
 ; to pass a scatter file through a C preprocessor.
 
 ;*******************************************************************************
 ;* \file cy8c6xxa_cm4_dual.scat
-;* \version `$CY_MAJOR_VERSION`.`$CY_MINOR_VERSION`
+;* \version 2.40
 ;*
 ;* Linker file for the ARMCC.
 ;*
@@ -46,10 +46,26 @@
   #define MBED_ROM_START    0x10002000
 #endif
 
+;* MBED_APP_START is being  used by the bootloader build script and
+;* will be calculate by the system. Without bootloader the MBED_APP_START
+;* is equal to MBED_ROM_START
+;*
+#if !defined(MBED_APP_START)
+  #define MBED_APP_START    MBED_ROM_START
+#endif
+
 #if !defined(MBED_ROM_SIZE)
   #define MBED_ROM_SIZE     0x001FE000
 #endif
 
+;* MBED_APP_SIZE is being  used by the bootloader build script and
+;* will be calculate by the system. Without bootloader the MBED_APP_SIZE
+;* is equal to MBED_ROM_SIZE
+;*
+#if !defined(MBED_APP_SIZE)
+  #define MBED_APP_SIZE     MBED_ROM_SIZE
+#endif
+
 #if !defined(MBED_RAM_START)
   #define MBED_RAM_START    0x08002000
 #endif
@@ -69,16 +85,16 @@
 
 ; The following defines control RAM and flash memory allocation for the CM4 core.
 ; You can change the memory allocation by editing RAM and Flash defines.
-; Note that 2 KB of RAM (at the end of the RAM section) are reserved for system use.
+; Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
 ; Using this memory region for other purposes will lead to unexpected behavior.
 ; Your changes must be aligned with the corresponding defines for CM0+ core in 'xx_cm0plus.scat',
 ; where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.scat'.
 ; RAM
 #define RAM_START               MBED_RAM_START
 #define RAM_SIZE                MBED_RAM_SIZE
 ; Flash
-#define FLASH_START             MBED_ROM_START
-#define FLASH_SIZE              MBED_ROM_SIZE
+#define FLASH_START             MBED_APP_START
+#define FLASH_SIZE              MBED_APP_SIZE
 
 ; The following defines describe a 32K flash region used for EEPROM emulation.
 ; This region can also be used as the general purpose flash.
@@ -252,5 +268,31 @@ CYMETA 0x90500000
     .cymeta +0 { * (.cymeta) }
 }
 
+/* The following symbols used by the cymcuelftool. */
+/* Flash */
+#define __cy_memory_0_start 0x10000000
+#define __cy_memory_0_length  0x00200000
+#define __cy_memory_0_row_size 0x200
+
+/* Emulated EEPROM Flash area */
+#define __cy_memory_1_start    0x14000000
+#define __cy_memory_1_length   0x8000
+#define __cy_memory_1_row_size 0x200
+
+/* Supervisory Flash */
+#define __cy_memory_2_start    0x16000000
+#define __cy_memory_2_length   0x8000
+#define __cy_memory_2_row_size 0x200
+
+/* XIP */
+#define __cy_memory_3_start    0x18000000
+#define __cy_memory_3_length   0x08000000
+#define __cy_memory_3_row_size 0x200
+
+/* eFuse */
+#define __cy_memory_4_start    0x90700000
+#define __cy_memory_4_length   0x100000
+#define __cy_memory_4_row_size 1
+
 
 /* [] END OF FILE */

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C62XX/TARGET_MCU_PSOC6_M0/system_psoc6_cm0plus_flash_init.h

@@ -1,5 +1,5 @@
 ;/**************************************************************************//**
-; * @file     startup_psoc6_02_cm4.s
+; * @file     startup_psoc6_02_cm4.S
 ; * @brief    CMSIS Core Device Startup File for
 ; *           ARMCM4 Device Series
 ; * @version  V5.00
@@ -39,7 +39,6 @@ Stack_Size      EQU     0x00000400
 Stack_Mem       SPACE   Stack_Size
 __initial_sp
 
-
 ; <h> Heap Configuration
 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
 ; </h>
@@ -82,7 +81,7 @@ __Vectors       DCD     __initial_sp              ; Top of Stack
                 DCD     PendSV_Handler                        ; PendSV Handler
                 DCD     SysTick_Handler                       ; SysTick Handler
 
-                ; External interrupts                         Power Mode  Description
+                ; External interrupts                           Description
                 DCD     ioss_interrupts_gpio_0_IRQHandler     ; GPIO Port Interrupt #0 
                 DCD     ioss_interrupts_gpio_1_IRQHandler     ; GPIO Port Interrupt #1 
                 DCD     ioss_interrupts_gpio_2_IRQHandler     ; GPIO Port Interrupt #2 
@@ -255,7 +254,6 @@ __Vectors       DCD     __initial_sp              ; Top of Stack
 __Vectors_End
 
 __Vectors_Size  EQU     __Vectors_End - __Vectors
-
                 EXPORT __ramVectors
                 AREA    RESET_RAM, READWRITE, NOINIT
 __ramVectors    SPACE   __Vectors_Size
@@ -272,11 +270,10 @@ __ramVectors    SPACE   __Vectors_Size
 ; The user of this function is responsible for initializing the PDL and resources before using them.
 ;
 Cy_OnResetUser  PROC
-                EXPORT  Cy_OnResetUser        [WEAK]
+                EXPORT  Cy_OnResetUser            [WEAK]
                 BX      LR
                 ENDP
 
-
 ; Reset Handler
 Reset_Handler   PROC
                 EXPORT  Reset_Handler             [WEAK]
@@ -383,7 +380,7 @@ SysTick_Handler     PROC
                     ENDP
 
 Default_Handler     PROC
-                    EXPORT      Default_Handler                        [WEAK]
+                    EXPORT  Default_Handler                       [WEAK]
                     EXPORT  ioss_interrupts_gpio_0_IRQHandler     [WEAK]
                     EXPORT  ioss_interrupts_gpio_1_IRQHandler     [WEAK]
                     EXPORT  ioss_interrupts_gpio_2_IRQHandler     [WEAK]
@@ -738,14 +735,13 @@ sdhc_1_interrupt_general_IRQHandler
 
                 ELSE
 
-                IMPORT  __use_two_region_memory
                 EXPORT  __user_initial_stackheap
 
 __user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
+                LDR     R0, =Heap_Mem
                 LDR     R1, =(Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
+                LDR     R2, =(Heap_Mem +  Heap_Size)
+                LDR     R3, =Stack_Mem
                 BX      LR
                 ENDP
 

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CMOD_062_4343W/device/TOOLCHAIN_ARM_STD/cy8c6xxa_cm4_dual.sct renamed to targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_4343W/device/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy8c6xxa_cm4_dual.ld
-* \version 2.30
+* \version 2.40
 *
 * Linker file for the GNU C compiler.
 *
@@ -44,10 +44,26 @@ ENTRY(Reset_Handler)
   #define MBED_ROM_START    0x10002000
 #endif
 
+/* MBED_APP_START is being  used by the bootloader build script and
+* will be calculate by the system. Without bootloader the MBED_APP_START
+* is equal to MBED_ROM_START
+*/
+#if !defined(MBED_APP_START)
+  #define MBED_APP_START MBED_ROM_START
+#endif
+
 #if !defined(MBED_ROM_SIZE)
   #define MBED_ROM_SIZE     0x001FE000
 #endif
 
+/* MBED_APP_SIZE is being  used by the bootloader build script and
+* will be calculate by the system. Without bootloader the MBED_APP_SIZE
+* is equal to MBED_ROM_SIZE
+*/
+#if !defined(MBED_APP_SIZE)
+  #define MBED_APP_SIZE MBED_ROM_SIZE
+#endif
+
 #if !defined(MBED_RAM_START)
   #define MBED_RAM_START    0x08002000
 #endif
@@ -77,13 +93,13 @@ MEMORY
 {
     /* The ram and flash regions control RAM and flash memory allocation for the CM4 core.
      * You can change the memory allocation by editing the 'ram' and 'flash' regions.
-     * Note that 2 KB of RAM (at the end of the RAM section) are reserved for system use.
+     * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
      * Using this memory region for other purposes will lead to unexpected behavior.
      * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld',
      * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'.
      */
     ram               (rwx)   : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
-    flash             (rx)    : ORIGIN = MBED_ROM_START, LENGTH = MBED_ROM_SIZE
+    flash             (rx)    : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
 
     /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
      * You can assign sections to this memory region for only one of the cores.