boards: stm32: stm32n6570_dk: Reduce the Tx clock signal skew

Reduce the Tx clock signal skew to 1ns
as it caused around 30% packet loss during ping
on some boards.

Signed-off-by: Julien Racki <julien.racki-ext@st.com>

Author: juickar

boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi

@@ -445,7 +445,7 @@ zephyr_udc0: &usbotg_hs1 {
  */
 &eth1_rgmii_gtx_clk_pf0 {
 	st,io-delay-path = "output";
-	st,io-delay-ps = <2000>;
+	st,io-delay-ps = <1000>;
 };
 
 &mac {