[PIC] Add pic support for variables

claziss · artemiy-volkov · commit fbae3e79ddea · 2025-05-28T07:09:38.000-07:00
diff --git a/gcc/config/arc64/arc64.c b/gcc/config/arc64/arc64.c
@@ -487,6 +487,12 @@ arc64_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
   if ((GET_CODE (x) == PRE_MODIFY || GET_CODE (x) == POST_MODIFY))
     return true;
 
+  /* PIC address.  */
+  if (GET_CODE (x) == LO_SUM
+      && REG_P (XEXP (x, 0))
+      && GET_CODE (XEXP (x, 1)) == UNSPEC)
+    return true;
+
   return false;
 }
 
@@ -933,7 +939,8 @@ arc64_print_operand (FILE *file, rtx x, int code)
 
     case 'h':
       if (GET_CODE (x) == SYMBOL_REF
-	  || GET_CODE (x) == LABEL_REF)
+	  || GET_CODE (x) == LABEL_REF
+	  || GET_CODE (x) == UNSPEC)
 	{
 	  output_addr_const (asm_out_file, x);
 	  break;
@@ -971,6 +978,7 @@ arc64_print_operand (FILE *file, rtx x, int code)
 
 	case LABEL_REF:
 	case SYMBOL_REF:
+	case UNSPEC:
 	  output_addr_const (asm_out_file, x);
 	  break;
 
@@ -1039,16 +1047,14 @@ arc64_print_operand_address (FILE *file , machine_mode mode, rtx addr)
       output_address (VOIDmode, XEXP (addr, 1));
       break;
 
-#if 0
       /* This type of address can be only accepted by LD instructions.  */
     case LO_SUM:
-      base = XEXP (addr,0);
-      index = XEXP (addr,1);
+      base = XEXP (addr, 0);
+      index = XEXP (addr, 1);
       arc64_print_operand_address (file, mode, base);
       fputc (',', file);
       output_addr_const (file, index);
       break;
-#endif
 
     case CONST_INT:
       output_addr_const (file, addr);
@@ -1069,6 +1075,44 @@ arc64_print_operand_punct_valid_p (unsigned char code)
   return (code == '?');
 }
 
+/* Implement TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA.  */
+
+static bool
+arc64_output_addr_const_extra (FILE *file, rtx x)
+{
+  rtx base;
+
+  if (GET_CODE (x) == UNSPEC)
+    {
+      base = XVECEXP (x, 0, 0);
+      output_addr_const (file, base);
+      switch (XINT (x, 1))
+	{
+	case ARC64_UNSPEC_GOTOFF:
+	  fputs ("@pcl", file);
+	  break;
+
+	case ARC64_UNSPEC_GOT:
+	  fputs ("@gotpc", file);
+	  break;
+
+	default:
+	  gcc_unreachable ();
+	}
+      return true;
+    }
+
+  return false;
+}
+
+/* Wrap X in an unspec of kind KIND.  */
+
+static rtx
+gen_sym_unspec (rtx x, int kind)
+{
+  return gen_rtx_UNSPEC (Pmode, gen_rtvec (1, x), kind);
+}
+
 /* Helper function.  Returns a valid ARC64 RTX that represents the
    argument X which is an invalid address RTX.  The argument SCRATCH
    may be used as a temp when building affresses.  */
@@ -1077,15 +1121,37 @@ static rtx
 arc64_legitimize_address_1 (rtx x, rtx scratch)
 {
   rtx base, addend, t1;
+  bool is_local = true;
 
   switch (GET_CODE (x))
     {
     case SYMBOL_REF:
+      is_local = SYMBOL_REF_LOCAL_P (x);
+      /* FALLTHRU */
+
     case LABEL_REF:
       t1 = can_create_pseudo_p () ? gen_reg_rtx (Pmode) : scratch;
       gcc_assert (t1);
-      emit_insn (gen_rtx_SET (t1, gen_rtx_HIGH (Pmode, x)));
-      return gen_rtx_LO_SUM (Pmode, t1, x);
+      if (!flag_pic)
+	{
+	  emit_insn (gen_rtx_SET (t1, gen_rtx_HIGH (Pmode, x)));
+	  return gen_rtx_LO_SUM (Pmode, t1, x);
+	}
+      else if (is_local)
+	{
+	  /* Local symbol, we can access it using a simple
+	     PCL-relative access.  */
+	  base = gen_sym_unspec (x, ARC64_UNSPEC_GOTOFF);
+	  return base;
+	}
+      else
+	{
+	  /* Global symbol, we access it via a load from the GOT.  */
+	  base = gen_sym_unspec (x, ARC64_UNSPEC_GOT);
+	  emit_insn (gen_rtx_SET (t1, gen_rtx_HIGH (Pmode, base)));
+	  t1 = gen_rtx_LO_SUM (Pmode, t1, copy_rtx (base));
+	  return gen_const_mem (Pmode, t1);
+	}
 
     case LO_SUM:
       return x;
@@ -1801,6 +1867,9 @@ arc64_limm_addr_p (rtx op)
 #undef TARGET_PROMOTE_PROTOTYPES
 #define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
 
+#undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA
+#define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA arc64_output_addr_const_extra
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-arc64.h"
diff --git a/gcc/config/arc64/arc64.md b/gcc/config/arc64/arc64.md
@@ -70,7 +70,9 @@
 
 (define_c_enum "unspec"
   [
-   VUNSPEC_ARC_BLOCKAGE
+   ARC64_UNSPEC_GOTOFF
+   ARC64_UNSPEC_GOT
+   ARC64_VUNSPEC_BLOCKAGE
    ])
 
 (include "constraints.md")
@@ -364,8 +366,8 @@ udivl, unknown, xor, xorl"
 ;; Long insns: movl, stl, ldl
 ;;
 (define_insn "*arc64_movdi"
-   [(set (match_operand:DI 0 "nonimmediate_operand" "=qh,    q,r,    r,    r,r, m")
-	 (match_operand:DI 1 "arc64_movl_operand"    "qh,U08S0,r,S12S0,S32S0,m, r"))]
+   [(set (match_operand:DI 0 "nonimmediate_operand" "=qh,    q,r,    r,    r,    r,r, m")
+	 (match_operand:DI 1 "arc64_movl_operand"    "qh,U08S0,r,S12S0,S32S0,SyPic,m, r"))]
    "register_operand (operands[0], DImode)
     || register_operand (operands[1], DImode)"
    "@
@@ -374,25 +376,27 @@ udivl, unknown, xor, xorl"
     movl\\t%0,%1
     movl\\t%0,%1
     movl\\t%0,%1
+    addl\\t%0,pcl,%1
     ldl%U1\\t%0,[%1]
     stl%U0\\t%1,[%0]"
-   [(set_attr "type" "move,move,move,move,move,ld,st")
-    (set_attr "length" "2,2,4,4,8,*,*")]
+   [(set_attr "type" "move,move,move,move,move,addl,ld,st")
+    (set_attr "length" "2,2,4,4,8,8,*,*")]
 )
 
 ;; Hi/Low moves for constant and symbol loading.
 
 (define_insn "*movdi_high"
-  [(set (match_operand:DI 0 "register_operand"   "=   r,   qh,    r")
+  [(set (match_operand:DI 0 "register_operand"   "=   r,   qh,    r,r")
 	(high:DI
-	 (match_operand:DI 1 "immediate_operand" "S12S0,SymIm,SymIm")))]
+	 (match_operand:DI 1 "arc64_immediate_or_pic" "S12S0,SymIm,SymIm,SyPic")))]
   ""
   "@
    movhl\\t%0,%h1
    movhl_s\\t%0,%h1
-   movhl\\t%0,%h1"
+   movhl\\t%0,%h1
+   addhl\\t%0,pcl,%h1"
   [(set_attr "type" "move")
-   (set_attr "length" "4,6,8")])
+   (set_attr "length" "4,6,8,8")])
 
 ;; The immediates are already trimmed to fit the 32 bit limm field.
 (define_insn "*movdi_high"
@@ -655,7 +659,7 @@ udivl, unknown, xor, xorl"
    (set_attr "length" "2")])
 
 (define_insn "blockage"
-  [(unspec_volatile [(const_int 0)] VUNSPEC_ARC_BLOCKAGE)]
+  [(unspec_volatile [(const_int 0)] ARC64_VUNSPEC_BLOCKAGE)]
   ""
   ""
   [(set_attr "length" "0")
diff --git a/gcc/config/arc64/constraints.md b/gcc/config/arc64/constraints.md
@@ -104,6 +104,10 @@
     (match_code "const_int")
     (match_test "SIGNED_INT6 (ival)")))
 
+(define_constraint "SyPic"
+  "@internal
+   Special symbol used for PIC addressing."
+  (match_code "unspec"))
 ;---------------------------------------------------------
 
 (define_constraint "U06S0" "@internal
diff --git a/gcc/config/arc64/predicates.md b/gcc/config/arc64/predicates.md
@@ -20,9 +20,10 @@
 
 ;; Place holder for mov operand predicate
 (define_predicate "arc64_movl_operand"
-  (and (match_code "reg, subreg, mem, const, const_int, symbol_ref, label_ref")
+  (and (match_code "unspec,reg, subreg, mem, const, const_int, symbol_ref, label_ref")
        (ior (match_operand 0 "register_operand")
 	    (match_operand 0 "memory_operand")
+	    (match_code "unspec")
 	    (and (match_code "const_int")
 		 (ior (match_test "UNSIGNED_INT32 (INTVAL (op))")
 		      (match_test "SIGNED_INT32 (INTVAL (op))"))))))
@@ -33,6 +34,11 @@
 	    (ior (match_test "UNSIGNED_INT32 (INTVAL (op))")
 		 (match_test "SIGNED_INT32 (INTVAL (op))")))))
 
+;; Used for HIGH or LO_SUM patterns
+(define_predicate "arc64_immediate_or_pic"
+  (ior (match_operand 0 "immediate_operand")
+       (match_code "unspec")))
+
 ;; Acceptable arguments for the call insn.
 (define_predicate "arc64_call_insn_operand"
   (ior (match_code "symbol_ref")
