@@ -22,7 +22,6 @@ extern crate proc_macro;
2222extern crate maplit;
2323
2424use futures:: TryStreamExt ;
25- use lazy_static:: lazy_static;
2625use proc_macro:: { Delimiter , Group , Ident , TokenStream , TokenTree } ;
2726use sqlx:: { Connection , Row } ;
2827
@@ -537,9 +536,11 @@ fn marker_is_compatible<'ᵉˣᵗʳᵃ>(
537536 }
538537}
539538
540- lazy_static ! {
541- static ref 𝔦𝔫𝔰𝔱𝔯𝔲𝔠𝔱𝔦𝔬𝔫𝔰_𝔦𝔫𝔣𝔬: ( String , String ) = get_instrution_info( ) ;
542- static ref 𝔱𝔞𝔯𝔤𝔢𝔱𝔰_𝔪𝔞𝔭_𝔩𝔢𝔤𝔞𝔠𝔶: std:: collections:: HashMap <& ' static str , std:: vec:: Vec <& ' static str >> = hashmap! {
539+ static 𝔦𝔫𝔰𝔱𝔯𝔲𝔠𝔱𝔦𝔬𝔫𝔰_𝔦𝔫𝔣𝔬: once_cell:: sync:: Lazy < ( String , String ) > = once_cell:: sync:: Lazy :: new ( get_instrution_info) ;
540+ static 𝔱𝔞𝔯𝔤𝔢𝔱𝔰_𝔪𝔞𝔭_𝔩𝔢𝔤𝔞𝔠𝔶: once_cell:: sync:: Lazy <
541+ std:: collections:: HashMap < & ' static str , std:: vec:: Vec < & ' static str > > ,
542+ > = once_cell:: sync:: Lazy :: new ( || {
543+ hashmap ! {
543544 "reg8" => vec![ "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗ" ] ,
544545 "reg16" => vec![ "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_16ᵇⁱᵗ" ] ,
545546 "reg32" => vec![ "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_32ᵇⁱᵗ" ] ,
@@ -548,8 +549,12 @@ lazy_static! {
548549 "reg/acc16" => vec![ "𝐚𝐜𝐜𝐮𝐦𝐮𝐥𝐚𝐭𝐨𝐫_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_16ᵇⁱᵗ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_16ᵇⁱᵗ" ] ,
549550 "reg/acc32" => vec![ "𝐚𝐜𝐜𝐮𝐦𝐮𝐥𝐚𝐭𝐨𝐫_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_32ᵇⁱᵗ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_32ᵇⁱᵗ" ] ,
550551 "reg/acc64" => vec![ ] ,
551- } ;
552- static ref 𝔱𝔞𝔯𝔤𝔢𝔱𝔰_𝔪𝔞𝔭_𝔵86_64: std:: collections:: HashMap <& ' static str , std:: vec:: Vec <& ' static str >> = hashmap! {
552+ }
553+ } ) ;
554+ static 𝔱𝔞𝔯𝔤𝔢𝔱𝔰_𝔪𝔞𝔭_𝔵86_64: once_cell:: sync:: Lazy <
555+ std:: collections:: HashMap < & ' static str , std:: vec:: Vec < & ' static str > > ,
556+ > = once_cell:: sync:: Lazy :: new ( || {
557+ hashmap ! {
553558 "reg8" => vec![ "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗₗₒ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗₙₒᵣₑₓ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗᵣₑₓ" ] ,
554559 "reg16" => vec![ "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_16ᵇⁱᵗₙₒᵣₑₓ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_16ᵇⁱᵗ" ] ,
555560 "reg32" => vec![ "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_32ᵇⁱᵗₙₒᵣₑₓ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_32ᵇⁱᵗ" ] ,
@@ -558,8 +563,8 @@ lazy_static! {
558563 "reg/acc16" => vec![ "𝐚𝐜𝐜𝐮𝐦𝐮𝐥𝐚𝐭𝐨𝐫_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_16ᵇⁱᵗ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_16ᵇⁱᵗₙₒᵣₑₓ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_16ᵇⁱᵗ" ] ,
559564 "reg/acc32" => vec![ "𝐚𝐜𝐜𝐮𝐦𝐮𝐥𝐚𝐭𝐨𝐫_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_32ᵇⁱᵗ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_32ᵇⁱᵗₙₒᵣₑₓ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_32ᵇⁱᵗ" ] ,
560565 "reg/acc64" => vec![ "𝐚𝐜𝐜𝐮𝐦𝐮𝐥𝐚𝐭𝐨𝐫_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_64ᵇⁱᵗ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_64ᵇⁱᵗₙₒᵣₑₓ" , "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_64ᵇⁱᵗ" ] ,
561- } ;
562- }
566+ }
567+ } ) ;
563568
564569#[ tokio:: main]
565570async fn get_instrution_info ( ) -> ( String , String ) {
@@ -576,30 +581,45 @@ async fn get_instrution_info() -> (String, String) {
576581 . await
577582 . expect ( "Failed to connect to test.db database" )
578583 } ;
579- let mut rows = sqlx:: query ( "SELECT * FROM instructions" )
580- . fetch ( & mut pool ) ;
581- let mut instruction_info_legacy = Vec :: new ( ) ;
582- let mut instruction_info_x64 = Vec :: new ( ) ;
583- while let Some ( row ) = rows . try_next ( ) . await . expect ( "Heh" ) {
584- let instruction_name : & str =row. try_get ( "instruction_name " ) . expect ( "whatever" ) ;
585- let instruction_argument0 : & str =row. try_get ( "instruction_argument0 " ) . expect ( "whatever" ) ;
586- let instruction_argument1 : & str =row . try_get ( "instruction_argument1" ) . expect ( "whatever" ) ;
587- if let Some ( instruction_argument_cases0 ) = 𝔱𝔞𝔯𝔤𝔢𝔱𝔰_𝔪𝔞𝔭_𝔩𝔢𝔤𝔞𝔠𝔶 . get ( instruction_argument0 ) {
584+ let mut rows = sqlx:: query ( "SELECT * FROM instructions" ) . fetch ( & mut pool ) ;
585+ let mut instruction_info_legacy = Vec :: new ( ) ;
586+ let mut instruction_info_x64 = Vec :: new ( ) ;
587+ while let Some ( row ) = rows . try_next ( ) . await . expect ( "Heh" ) {
588+ let instruction_name : & str = row . try_get ( "instruction_name" ) . expect ( "whatever" ) ;
589+ let instruction_argument0 : & str = row. try_get ( "instruction_argument0 " ) . expect ( "whatever" ) ;
590+ let instruction_argument1 : & str = row. try_get ( "instruction_argument1 " ) . expect ( "whatever" ) ;
591+ if let Some ( instruction_argument_cases0 ) = 𝔱𝔞𝔯𝔤𝔢𝔱𝔰_𝔪𝔞𝔭_𝔩𝔢𝔤𝔞𝔠𝔶 . get ( instruction_argument0 )
592+ {
588593 for instruction_argument_case0 in instruction_argument_cases0 {
589- if let Some ( instruction_argument_cases1) = 𝔱𝔞𝔯𝔤𝔢𝔱𝔰_𝔪𝔞𝔭_𝔩𝔢𝔤𝔞𝔠𝔶. get ( instruction_argument1) {
594+ if let Some ( instruction_argument_cases1) = 𝔱𝔞𝔯𝔤𝔢𝔱𝔰_𝔪𝔞𝔭_𝔩𝔢𝔤𝔞𝔠𝔶. get ( instruction_argument1)
595+ {
590596 for instruction_argument_case1 in instruction_argument_cases1 {
591- instruction_info_legacy. push ( format ! ( "{}_𝒊𝒏𝒔𝒕𝒓𝒖𝒄𝒕𝒊𝒐𝒏<(Self::{}, Self::{})>" , 𝗍𝗋𝖺𝗂𝗍_𝗇𝖺𝗆𝖾( instruction_name) , instruction_argument_case0, instruction_argument_case1) ) ;
597+ instruction_info_legacy. push ( format ! (
598+ "{}_𝒊𝒏𝒔𝒕𝒓𝒖𝒄𝒕𝒊𝒐𝒏<(Self::{}, Self::{})>" ,
599+ 𝗍𝗋𝖺𝗂𝗍_𝗇𝖺𝗆𝖾( instruction_name) ,
600+ instruction_argument_case0,
601+ instruction_argument_case1
602+ ) ) ;
592603 }
593604 }
594605 }
595606 }
596607 if let Some ( instruction_argument_cases0) = 𝔱𝔞𝔯𝔤𝔢𝔱𝔰_𝔪𝔞𝔭_𝔵86_64. get ( instruction_argument0) {
597608 for instruction_argument_case0 in instruction_argument_cases0 {
598- if let Some ( instruction_argument_cases1) = 𝔱𝔞𝔯𝔤𝔢𝔱𝔰_𝔪𝔞𝔭_𝔵86_64. get ( instruction_argument1) {
609+ if let Some ( instruction_argument_cases1) = 𝔱𝔞𝔯𝔤𝔢𝔱𝔰_𝔪𝔞𝔭_𝔵86_64. get ( instruction_argument1)
610+ {
599611 for instruction_argument_case1 in instruction_argument_cases1 {
600- if ( * instruction_argument_case0 != "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗᵣₑₓ" || * instruction_argument_case1 != "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗₙₒᵣₑₓ" ) &&
601- ( * instruction_argument_case0 != "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗₙₒᵣₑₓ" || * instruction_argument_case1 != "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗᵣₑₓ" ) {
602- instruction_info_x64. push ( format ! ( "{}_𝒊𝒏𝒔𝒕𝒓𝒖𝒄𝒕𝒊𝒐𝒏<(Self::{}, Self::{})>" , 𝗍𝗋𝖺𝗂𝗍_𝗇𝖺𝗆𝖾( instruction_name) , instruction_argument_case0, instruction_argument_case1) ) ;
612+ if ( * instruction_argument_case0 != "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗᵣₑₓ"
613+ || * instruction_argument_case1 != "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗₙₒᵣₑₓ" )
614+ && ( * instruction_argument_case0 != "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗₙₒᵣₑₓ"
615+ || * instruction_argument_case1 != "𝐠𝐩_𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫_8ᵇⁱᵗᵣₑₓ" )
616+ {
617+ instruction_info_x64. push ( format ! (
618+ "{}_𝒊𝒏𝒔𝒕𝒓𝒖𝒄𝒕𝒊𝒐𝒏<(Self::{}, Self::{})>" ,
619+ 𝗍𝗋𝖺𝗂𝗍_𝗇𝖺𝗆𝖾( instruction_name) ,
620+ instruction_argument_case0,
621+ instruction_argument_case1
622+ ) ) ;
603623 }
604624 }
605625 }
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