Add zip_hi/zip_lo for shuffling operations

Add zip_hi/zip_lo for shuffling operations mentioned in issues#412.

Change-Id: I0244c4bbfca246636bdfd0baf03eb77fdf1b95e9
Signed-off-by: Yuqi Gu <guyuqi@apache.com>

Author: Yuqi Gu

include/xsimd/types/xsimd_base.hpp

@@ -282,6 +282,12 @@ namespace xsimd
     template <class X>
     batch_type_t<X> select(const typename simd_batch_traits<X>::batch_bool_type& cond, const simd_base<X>& a, const simd_base<X>& b);
 
+    template <class X>
+    batch_type_t<X> zip_lo(const simd_base<X>& lhs, const simd_base<X>& rhs);
+
+    template <class X>
+    batch_type_t<X> zip_hi(const simd_base<X>& lhs, const simd_base<X>& rhs);
+
     template <class X>
     typename simd_batch_traits<X>::batch_bool_type
     isnan(const simd_base<X>& x);
@@ -1777,6 +1783,36 @@ namespace xsimd
         return kernel::select(cond, a(), b());
     }
 
+    /**
+     * Unpack and interleave data from the LOW half of batches \c lhs and \c rhs.
+     * Store the results in the Return value.
+     * @param lhs a batch of integer or floating point or double precision values.
+     * @param rhs a batch of integer or floating point or double precision values.
+     * @return a batch of the low part of shuffled values.
+     */
+    template <class X>
+    inline batch_type_t<X> zip_lo(const simd_base<X>& lhs, const simd_base<X>& rhs)
+    {
+        using value_type = typename simd_batch_traits<X>::value_type;
+        using kernel = detail::batch_kernel<value_type, simd_batch_traits<X>::size>;
+        return kernel::zip_lo(lhs(), rhs());
+    }
+
+    /**
+     * Unpack and interleave data from the HIGH half of batches \c lhs and \c rhs.
+     * Store the results in the Return value.
+     * @param lhs a batch of integer or floating point or double precision values.
+     * @param rhs a batch of integer or floating point or double precision values.
+     * @return a batch of the high part of shuffled values.
+     */
+    template <class X>
+    inline batch_type_t<X> zip_hi(const simd_base<X>& lhs, const simd_base<X>& rhs)
+    {
+        using value_type = typename simd_batch_traits<X>::value_type;
+        using kernel = detail::batch_kernel<value_type, simd_batch_traits<X>::size>;
+        return kernel::zip_hi(lhs(), rhs());
+    }
+
     /**
      * Determines if the scalars in the given batch \c x are NaN values.
      * @param x batch of floating point values.

include/xsimd/types/xsimd_neon_double.hpp

@@ -580,6 +580,16 @@ namespace xsimd
                 return vbslq_f64(cond, a, b);
             }
 
+            static batch_type zip_lo(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip1q_f64(lhs, rhs);
+            }
+
+            static batch_type zip_hi(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip2q_f64(lhs, rhs);
+            }
+
             static batch_bool_type isnan(const batch_type& x)
             {
                 return !(x == x);

include/xsimd/types/xsimd_neon_float.hpp

@@ -639,6 +639,16 @@ namespace xsimd
                 return vbslq_f32(cond, a, b);
             }
 
+            static batch_type zip_lo(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip1q_f32(lhs, rhs);
+            }
+
+            static batch_type zip_hi(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip2q_f32(lhs, rhs);
+            }
+
             static batch_bool_type isnan(const batch_type& x)
             {
                 return !(x == x);

include/xsimd/types/xsimd_neon_int16.hpp

@@ -344,6 +344,16 @@ namespace xsimd
             {
                 return vbslq_s16(cond, a, b);
             }
+
+            static batch_type zip_lo(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip1q_s16(lhs, rhs);
+            }
+
+            static batch_type zip_hi(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip2q_s16(lhs, rhs);
+            }
         };
     }
 

include/xsimd/types/xsimd_neon_int32.hpp

@@ -424,6 +424,16 @@ namespace xsimd
             {
                 return vbslq_s32(cond, a, b);
             }
+
+            static batch_type zip_lo(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip1q_s32(lhs, rhs);
+            }
+
+            static batch_type zip_hi(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip2q_s32(lhs, rhs);
+            }
         };
     }
 

include/xsimd/types/xsimd_neon_int64.hpp

@@ -439,6 +439,16 @@ namespace xsimd
             {
                 return vbslq_s64(cond, a, b);
             }
+
+            static batch_type zip_lo(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip1q_s64(lhs, rhs);
+            }
+
+            static batch_type zip_hi(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip2q_s64(lhs, rhs);
+            }
         };
     }
 

include/xsimd/types/xsimd_neon_int8.hpp

@@ -345,6 +345,16 @@ namespace xsimd
             {
                 return vbslq_s8(cond, a, b);
             }
+
+            static batch_type zip_lo(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip1q_s8(lhs, rhs);
+            }
+
+            static batch_type zip_hi(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip2q_s8(lhs, rhs);
+            }
         };
     }
 

include/xsimd/types/xsimd_neon_uint16.hpp

@@ -318,6 +318,16 @@ namespace xsimd
             {
                 return vbslq_u16(cond, a, b);
             }
+
+            static batch_type zip_lo(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip1q_u16(lhs, rhs);
+            }
+
+            static batch_type zip_hi(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip2q_u16(lhs, rhs);
+            }
         };
     }
 

include/xsimd/types/xsimd_neon_uint32.hpp

@@ -415,6 +415,16 @@ namespace xsimd
             {
                 return vbslq_u32(cond, a, b);
             }
+
+            static batch_type zip_lo(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip1q_u32(lhs, rhs);
+            }
+
+            static batch_type zip_hi(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip2q_u32(lhs, rhs);
+            }
         };
 
         inline batch<uint32_t, 4> shift_left(const batch<uint32_t, 4>& lhs, int32_t n)

include/xsimd/types/xsimd_neon_uint64.hpp

@@ -467,6 +467,16 @@ namespace xsimd
             {
                 return vbslq_u64(cond, a, b);
             }
+
+            static batch_type zip_lo(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip1q_u64(lhs, rhs);
+            }
+
+            static batch_type zip_hi(const batch_type& lhs, const batch_type& rhs)
+            {
+                return vzip2q_u64(lhs, rhs);
+            }
         };
 
         inline batch<uint64_t, 2> shift_left(const batch<uint64_t, 2>& lhs, int32_t n)