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Fix clang-17 miscompilation of __riscv_vreinterpret_u8m8
Fix #1059
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include/xsimd/types/xsimd_rvv_register.hpp

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@@ -125,6 +125,15 @@ namespace xsimd
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#undef XSIMD_RVV_MAKE_TYPES
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#undef XSIMD_RVV_MAKE_TYPE
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// Specialization needed for #1058
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template <>
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XSIMD_INLINE rvv_type_info<int8_t, rvv_width_m1 * 8>::type
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rvv_type_info<int8_t, rvv_width_m1 * 8>::bitcast<__rvv_uint8m8_t>(
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__rvv_uint8m8_t x) noexcept
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{
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return __riscv_vreinterpret_i8m8(x);
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}
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// rvv_blob is storage-type abstraction for a vector register.
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template <class T, size_t Width>
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struct rvv_blob : public rvv_type_info<T, Width>

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