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| 1 | +// +build esp32c3 |
| 2 | + |
| 3 | +package machine |
| 4 | + |
| 5 | +import ( |
| 6 | + "device/esp" |
| 7 | + "runtime/volatile" |
| 8 | + "unsafe" |
| 9 | +) |
| 10 | + |
| 11 | +// CPUFrequency returns the current CPU frequency of the chip. |
| 12 | +// Currently it is a fixed frequency but it may allow changing in the future. |
| 13 | +func CPUFrequency() uint32 { |
| 14 | + return 160e6 // 160MHz |
| 15 | +} |
| 16 | + |
| 17 | +const ( |
| 18 | + PinOutput PinMode = iota |
| 19 | + PinInput |
| 20 | + PinInputPullup |
| 21 | + PinInputPulldown |
| 22 | +) |
| 23 | + |
| 24 | +// Configure this pin with the given configuration. |
| 25 | +func (p Pin) Configure(config PinConfig) { |
| 26 | + if p == NoPin { |
| 27 | + // This simplifies pin configuration in peripherals such as SPI. |
| 28 | + return |
| 29 | + } |
| 30 | + |
| 31 | + var muxConfig uint32 |
| 32 | + |
| 33 | + // Configure this pin as a GPIO pin. |
| 34 | + const function = 1 // function 1 is GPIO for every pin |
| 35 | + muxConfig |= function << esp.IO_MUX_GPIO_MCU_SEL_Pos |
| 36 | + |
| 37 | + // Make this pin an input pin (always). |
| 38 | + muxConfig |= esp.IO_MUX_GPIO_FUN_IE |
| 39 | + |
| 40 | + // Set drive strength: 0 is lowest, 3 is highest. |
| 41 | + muxConfig |= 2 << esp.IO_MUX_GPIO_FUN_DRV_Pos |
| 42 | + |
| 43 | + // Select pull mode. |
| 44 | + if config.Mode == PinInputPullup { |
| 45 | + muxConfig |= esp.IO_MUX_GPIO_FUN_WPU |
| 46 | + } else if config.Mode == PinInputPulldown { |
| 47 | + muxConfig |= esp.IO_MUX_GPIO_FUN_WPD |
| 48 | + } |
| 49 | + |
| 50 | + // Configure the pad with the given IO mux configuration. |
| 51 | + p.mux().Set(muxConfig) |
| 52 | + |
| 53 | + // Set the output signal to the simple GPIO output. |
| 54 | + p.outFunc().Set(0x80) |
| 55 | + |
| 56 | + switch config.Mode { |
| 57 | + case PinOutput: |
| 58 | + // Set the 'output enable' bit. |
| 59 | + esp.GPIO.ENABLE_W1TS.Set(1 << p) |
| 60 | + case PinInput, PinInputPullup, PinInputPulldown: |
| 61 | + // Clear the 'output enable' bit. |
| 62 | + esp.GPIO.ENABLE_W1TC.Set(1 << p) |
| 63 | + } |
| 64 | +} |
| 65 | + |
| 66 | +// outFunc returns the FUNCx_OUT_SEL_CFG register used for configuring the |
| 67 | +// output function selection. |
| 68 | +func (p Pin) outFunc() *volatile.Register32 { |
| 69 | + return (*volatile.Register32)(unsafe.Pointer((uintptr(unsafe.Pointer(&esp.GPIO.FUNC0_OUT_SEL_CFG)) + uintptr(p)*4))) |
| 70 | +} |
| 71 | + |
| 72 | +// inFunc returns the FUNCy_IN_SEL_CFG register used for configuring the input |
| 73 | +// function selection. |
| 74 | +func inFunc(signal uint32) *volatile.Register32 { |
| 75 | + return (*volatile.Register32)(unsafe.Pointer((uintptr(unsafe.Pointer(&esp.GPIO.FUNC0_IN_SEL_CFG)) + uintptr(signal)*4))) |
| 76 | +} |
| 77 | + |
| 78 | +// mux returns the I/O mux configuration register corresponding to the given |
| 79 | +// GPIO pin. |
| 80 | +func (p Pin) mux() *volatile.Register32 { |
| 81 | + return (*volatile.Register32)(unsafe.Pointer((uintptr(unsafe.Pointer(&esp.IO_MUX.GPIO0)) + uintptr(p)*4))) |
| 82 | +} |
| 83 | + |
| 84 | +// Set the pin to high or low. |
| 85 | +// Warning: only use this on an output pin! |
| 86 | +func (p Pin) Set(value bool) { |
| 87 | + if value { |
| 88 | + reg, mask := p.portMaskSet() |
| 89 | + reg.Set(mask) |
| 90 | + } else { |
| 91 | + reg, mask := p.portMaskClear() |
| 92 | + reg.Set(mask) |
| 93 | + } |
| 94 | +} |
| 95 | + |
| 96 | +// Return the register and mask to enable a given GPIO pin. This can be used to |
| 97 | +// implement bit-banged drivers. |
| 98 | +// |
| 99 | +// Warning: only use this on an output pin! |
| 100 | +func (p Pin) PortMaskSet() (*uint32, uint32) { |
| 101 | + reg, mask := p.portMaskSet() |
| 102 | + return ®.Reg, mask |
| 103 | +} |
| 104 | + |
| 105 | +// Return the register and mask to disable a given GPIO pin. This can be used to |
| 106 | +// implement bit-banged drivers. |
| 107 | +// |
| 108 | +// Warning: only use this on an output pin! |
| 109 | +func (p Pin) PortMaskClear() (*uint32, uint32) { |
| 110 | + reg, mask := p.portMaskClear() |
| 111 | + return ®.Reg, mask |
| 112 | +} |
| 113 | + |
| 114 | +func (p Pin) portMaskSet() (*volatile.Register32, uint32) { |
| 115 | + return &esp.GPIO.OUT_W1TS, 1 << p |
| 116 | +} |
| 117 | + |
| 118 | +func (p Pin) portMaskClear() (*volatile.Register32, uint32) { |
| 119 | + return &esp.GPIO.OUT_W1TC, 1 << p |
| 120 | +} |
| 121 | + |
| 122 | +var DefaultUART = UART0 |
| 123 | + |
| 124 | +var ( |
| 125 | + UART0 = &_UART0 |
| 126 | + _UART0 = UART{Bus: esp.UART0, Buffer: NewRingBuffer()} |
| 127 | + UART1 = &_UART1 |
| 128 | + _UART1 = UART{Bus: esp.UART1, Buffer: NewRingBuffer()} |
| 129 | +) |
| 130 | + |
| 131 | +type UART struct { |
| 132 | + Bus *esp.UART_Type |
| 133 | + Buffer *RingBuffer |
| 134 | +} |
| 135 | + |
| 136 | +func (uart *UART) WriteByte(b byte) error { |
| 137 | + for (uart.Bus.STATUS.Get()&esp.UART_STATUS_TXFIFO_CNT_Msk)>>esp.UART_STATUS_TXFIFO_CNT_Pos >= 128 { |
| 138 | + // Read UART_TXFIFO_CNT from the status register, which indicates how |
| 139 | + // many bytes there are in the transmit buffer. Wait until there are |
| 140 | + // less than 128 bytes in this buffer (the default buffer size). |
| 141 | + } |
| 142 | + uart.Bus.FIFO.Set(uint32(b)) |
| 143 | + return nil |
| 144 | +} |
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