@@ -74,20 +74,20 @@ struct spi_struct_t {
7474 int8_t miso ;
7575 int8_t mosi ;
7676 int8_t ss ;
77+ bool ss_invert ;
7778};
7879
7980#if CONFIG_IDF_TARGET_ESP32S2
8081// ESP32S2
81- #define SPI_COUNT (3 )
82+ #define SPI_COUNT (2 )
8283
83- #define SPI_CLK_IDX (p ) ((p == 0) ? SPICLK_OUT_MUX_IDX : ((p == 1) ? FSPICLK_OUT_MUX_IDX : ((p == 2) ? SPI3_CLK_OUT_MUX_IDX : 0) ))
84- #define SPI_MISO_IDX (p ) ((p == 0) ? SPIQ_OUT_IDX : ((p == 1) ? FSPIQ_OUT_IDX : ((p == 2) ? SPI3_Q_OUT_IDX : 0) ))
85- #define SPI_MOSI_IDX (p ) ((p == 0) ? SPID_IN_IDX : ((p == 1) ? FSPID_IN_IDX : ((p == 2) ? SPI3_D_IN_IDX : 0) ))
84+ #define SPI_CLK_IDX (p ) ((p == 0) ? FSPICLK_OUT_MUX_IDX : ((p == 1) ? SPI3_CLK_OUT_MUX_IDX : 0))
85+ #define SPI_MISO_IDX (p ) ((p == 0) ? FSPIQ_OUT_IDX : ((p == 1) ? SPI3_Q_OUT_IDX : 0))
86+ #define SPI_MOSI_IDX (p ) ((p == 0) ? FSPID_IN_IDX : ((p == 1) ? SPI3_D_IN_IDX : 0))
8687
87- #define SPI_SPI_SS_IDX (n ) ((n == 0) ? SPICS0_OUT_IDX : ((n == 1) ? SPICS1_OUT_IDX : 0))
88- #define SPI_HSPI_SS_IDX (n ) ((n == 0) ? SPI3_CS0_OUT_IDX : ((n == 1) ? SPI3_CS1_OUT_IDX : ((n == 2) ? SPI3_CS2_OUT_IDX : SPI3_CS0_OUT_IDX)))
89- #define SPI_FSPI_SS_IDX (n ) ((n == 0) ? FSPICS0_OUT_IDX : ((n == 1) ? FSPICS1_OUT_IDX : ((n == 2) ? FSPICS2_OUT_IDX : FSPICS0_OUT_IDX)))
90- #define SPI_SS_IDX (p , n ) ((p == 0) ? SPI_SPI_SS_IDX(n) : ((p == 1) ? SPI_SPI_SS_IDX(n) : ((p == 2) ? SPI_HSPI_SS_IDX(n) : 0)))
88+ #define SPI_HSPI_SS_IDX (n ) ((n == 0) ? SPI3_CS0_OUT_IDX : ((n == 1) ? SPI3_CS1_OUT_IDX : ((n == 2) ? SPI3_CS2_OUT_IDX : 0)))
89+ #define SPI_FSPI_SS_IDX (n ) ((n == 0) ? FSPICS0_OUT_IDX : ((n == 1) ? FSPICS1_OUT_IDX : ((n == 2) ? FSPICS2_OUT_IDX : 0)))
90+ #define SPI_SS_IDX (p , n ) ((p == 0) ? SPI_FSPI_SS_IDX(n) : ((p == 1) ? SPI_HSPI_SS_IDX(n) : 0))
9191
9292#elif CONFIG_IDF_TARGET_ESP32S3
9393// ESP32S3
@@ -97,8 +97,8 @@ struct spi_struct_t {
9797#define SPI_MISO_IDX (p ) ((p == 0) ? FSPIQ_OUT_IDX : ((p == 1) ? SPI3_Q_OUT_IDX : 0))
9898#define SPI_MOSI_IDX (p ) ((p == 0) ? FSPID_IN_IDX : ((p == 1) ? SPI3_D_IN_IDX : 0))
9999
100- #define SPI_HSPI_SS_IDX (n ) ((n == 0) ? SPI3_CS0_OUT_IDX : ((n == 1) ? SPI3_CS1_OUT_IDX : 0 ))
101- #define SPI_FSPI_SS_IDX (n ) ((n == 0) ? FSPICS0_OUT_IDX : ((n == 1) ? FSPICS1_OUT_IDX : 0 ))
100+ #define SPI_HSPI_SS_IDX (n ) ((n == 0) ? SPI3_CS0_OUT_IDX : ((n == 1) ? SPI3_CS1_OUT_IDX : ((n == 2) ? SPI3_CS2_OUT_IDX : 0) ))
101+ #define SPI_FSPI_SS_IDX (n ) ((n == 0) ? FSPICS0_OUT_IDX : ((n == 1) ? FSPICS1_OUT_IDX : ((n == 2) ? FSPICS2_OUT_IDX : 0) ))
102102#define SPI_SS_IDX (p , n ) ((p == 0) ? SPI_FSPI_SS_IDX(n) : ((p == 1) ? SPI_HSPI_SS_IDX(n) : 0))
103103
104104#elif CONFIG_IDF_TARGET_ESP32P4
@@ -150,24 +150,20 @@ struct spi_struct_t {
150150#define SPI_MUTEX_UNLOCK ()
151151// clang-format off
152152static spi_t _spi_bus_array [] = {
153- #if CONFIG_IDF_TARGET_ESP32S2
154- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), 0 , -1 , -1 , -1 , -1 },
155- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 1 , -1 , -1 , -1 , -1 },
156- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 2 , -1 , -1 , -1 , -1 }
157- #elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
158- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 },
159- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 1 , -1 , -1 , -1 , -1 }
153+ #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
154+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false},
155+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 1 , -1 , -1 , -1 , -1 , false}
160156#elif CONFIG_IDF_TARGET_ESP32C2
161- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 }
157+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false }
162158#elif CONFIG_IDF_TARGET_ESP32C3
163- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 }
159+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false }
164160#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
165- {(spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 }
161+ {(spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false }
166162#else
167- {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), 0 , -1 , -1 , -1 , -1 },
168- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), 1 , -1 , -1 , -1 , -1 },
169- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 2 , -1 , -1 , -1 , -1 },
170- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 3 , -1 , -1 , -1 , -1 }
163+ {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), 0 , -1 , -1 , -1 , -1 , false },
164+ {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), 1 , -1 , -1 , -1 , -1 , false },
165+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 2 , -1 , -1 , -1 , -1 , false },
166+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 3 , -1 , -1 , -1 , -1 , false }
171167#endif
172168};
173169// clang-format on
@@ -178,23 +174,19 @@ static spi_t _spi_bus_array[] = {
178174#define SPI_MUTEX_UNLOCK () xSemaphoreGive(spi->lock)
179175
180176static spi_t _spi_bus_array [] = {
181- #if CONFIG_IDF_TARGET_ESP32S2
182- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), NULL , 0 , -1 , -1 , -1 , -1 },
183- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 1 , -1 , -1 , -1 , -1 },
184- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 2 , -1 , -1 , -1 , -1 }
185- #elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
186- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }, {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 1 , -1 , -1 , -1 , -1 }
177+ #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
178+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false}, {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 1 , -1 , -1 , -1 , -1 , false}
187179#elif CONFIG_IDF_TARGET_ESP32C2
188- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }
180+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false }
189181#elif CONFIG_IDF_TARGET_ESP32C3
190- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }
182+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false }
191183#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
192- {(spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }
184+ {(spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false }
193185#else
194- {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), NULL , 0 , -1 , -1 , -1 , -1 },
195- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), NULL , 1 , -1 , -1 , -1 , -1 },
196- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 2 , -1 , -1 , -1 , -1 },
197- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 3 , -1 , -1 , -1 , -1 }
186+ {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false },
187+ {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), NULL , 1 , -1 , -1 , -1 , -1 , false },
188+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 2 , -1 , -1 , -1 , -1 , false },
189+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 3 , -1 , -1 , -1 , -1 , false }
198190#endif
199191};
200192#endif
@@ -365,7 +357,7 @@ bool spiAttachSS(spi_t *spi, uint8_t ss_num, int8_t ss) {
365357 return false;
366358 }
367359 pinMode (ss , OUTPUT );
368- pinMatrixOutAttach (ss , SPI_SS_IDX (spi -> num , ss_num ), false , false);
360+ pinMatrixOutAttach (ss , SPI_SS_IDX (spi -> num , ss_num ), spi -> ss_invert , false);
369361 spiEnableSSPins (spi , (1 << ss_num ));
370362 spi -> ss = ss ;
371363 if (!perimanSetPinBus (ss , ESP32_BUS_TYPE_SPI_MASTER_SS , (void * )(spi -> num + 1 ), spi -> num , -1 )) {
@@ -435,6 +427,12 @@ void spiSSDisable(spi_t *spi) {
435427 SPI_MUTEX_UNLOCK ();
436428}
437429
430+ void spiSSInvert (spi_t * spi , bool invert ) {
431+ if (spi ) {
432+ spi -> ss_invert = invert ;
433+ }
434+ }
435+
438436void spiSSSet (spi_t * spi ) {
439437 if (!spi ) {
440438 return ;
@@ -614,6 +612,7 @@ void spiStopBus(spi_t *spi) {
614612
615613spi_t * spiStartBus (uint8_t spi_num , uint32_t clockDiv , uint8_t dataMode , uint8_t bitOrder ) {
616614 if (spi_num >= SPI_COUNT ) {
615+ log_e ("SPI bus index %d is out of range" , spi_num );
617616 return NULL ;
618617 }
619618
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