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1 parent 6525dc4 commit f98a8d8Copy full SHA for f98a8d8
minimal.dts
@@ -25,7 +25,7 @@
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compatible = "riscv";
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reg = <0>;
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riscv,isa = "rv32ima";
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- mmu-type = "riscv,rv32";
+ mmu-type = "riscv,sv32";
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cpu0_intc: interrupt-controller {
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#interrupt-cells = <1>;
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#address-cells = <0>;
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