From 3fede2aa79f532c2a3771587921b6cfdef5f763f Mon Sep 17 00:00:00 2001
From: Max042004 <sau525@gmail.com>
Date: Fri, 7 Nov 2025 21:44:14 +0800
Subject: [PATCH] Fix synchronize cycle CSR update

---
 src/rv32_template.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/rv32_template.c b/src/rv32_template.c
index 14ad8b7a..6b46f36f 100644
--- a/src/rv32_template.c
+++ b/src/rv32_template.c
@@ -1216,6 +1216,7 @@ RVOP(
 RVOP(
     csrrw,
     {
+        rv->csr_cycle = cycle;
         uint32_t tmp = csr_csrrw(rv, ir->imm, rv->X[ir->rs1]);
         rv->X[ir->rd] = ir->rd ? tmp : rv->X[ir->rd];
     },
@@ -1235,6 +1236,7 @@ RVOP(
 RVOP(
     csrrs,
     {
+        rv->csr_cycle = cycle;
         uint32_t tmp = csr_csrrs(
             rv, ir->imm, (ir->rs1 == rv_reg_zero) ? 0U : rv->X[ir->rs1]);
         rv->X[ir->rd] = ir->rd ? tmp : rv->X[ir->rd];
@@ -1247,6 +1249,7 @@ RVOP(
 RVOP(
     csrrc,
     {
+        rv->csr_cycle = cycle;
         uint32_t tmp = csr_csrrc(
             rv, ir->imm, (ir->rs1 == rv_reg_zero) ? 0U : rv->X[ir->rs1]);
         rv->X[ir->rd] = ir->rd ? tmp : rv->X[ir->rd];
@@ -1259,6 +1262,7 @@ RVOP(
 RVOP(
     csrrwi,
     {
+        rv->csr_cycle = cycle;
         uint32_t tmp = csr_csrrw(rv, ir->imm, ir->rs1);
         rv->X[ir->rd] = ir->rd ? tmp : rv->X[ir->rd];
     },
@@ -1270,6 +1274,7 @@ RVOP(
 RVOP(
     csrrsi,
     {
+        rv->csr_cycle = cycle;
         uint32_t tmp = csr_csrrs(rv, ir->imm, ir->rs1);
         rv->X[ir->rd] = ir->rd ? tmp : rv->X[ir->rd];
     },
@@ -1281,6 +1286,7 @@ RVOP(
 RVOP(
     csrrci,
     {
+        rv->csr_cycle = cycle;
         uint32_t tmp = csr_csrrc(rv, ir->imm, ir->rs1);
         rv->X[ir->rd] = ir->rd ? tmp : rv->X[ir->rd];
     },