[RISCV][llvm] Update CSRs

According the newest RISC-V Privileged Spec, updated CSRs.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D116645

Author: Shao-Ce SUN

llvm/lib/Target/RISCV/RISCVSystemOperands.td

@@ -1,4 +1,4 @@
-//===- RISCVSystemOperands.td ----------------------------*- tablegen -*-===//
+//===- RISCVSystemOperands.td ------------------------------*- tablegen -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
@@ -70,34 +70,34 @@ def lookupSysRegByDeprecatedName : SearchIndex {
 // 2.3, 2.4 and  2.5 in the RISC-V Instruction Set Manual
 // Volume II: Privileged Architecture.
 
-//===--------------------------
+//===----------------------------------------------------------------------===//
 // User Trap Setup
-//===--------------------------
+//===----------------------------------------------------------------------===//
 def : SysReg<"ustatus", 0x000>;
 def : SysReg<"uie", 0x004>;
 def : SysReg<"utvec", 0x005>;
 
-//===--------------------------
+//===----------------------------------------------------------------------===//
 // User Trap Handling
-//===--------------------------
+//===----------------------------------------------------------------------===//
 def : SysReg<"uscratch", 0x040>;
 def : SysReg<"uepc", 0x041>;
 def : SysReg<"ucause", 0x042>;
 let DeprecatedName = "ubadaddr" in
 def : SysReg<"utval", 0x043>;
 def : SysReg<"uip", 0x044>;
 
-//===--------------------------
+//===----------------------------------------------------------------------===//
 // User Floating-Point CSRs
-//===--------------------------
+//===----------------------------------------------------------------------===//
 
 def SysRegFFLAGS : SysReg<"fflags", 0x001>;
 def SysRegFRM    : SysReg<"frm", 0x002>;
 def SysRegFCSR   : SysReg<"fcsr", 0x003>;
 
-//===--------------------------
+//===----------------------------------------------------------------------===//
 // User Counter/Timers
-//===--------------------------
+//===----------------------------------------------------------------------===//
 def CYCLE   : SysReg<"cycle", 0xC00>;
 def TIME    : SysReg<"time", 0xC01>;
 def INSTRET : SysReg<"instret", 0xC02>;
@@ -168,71 +168,180 @@ def: SysReg<"hpmcounter30h", 0xC9E>;
 def: SysReg<"hpmcounter31h", 0xC9F>;
 }
 
-//===--------------------------
+//===----------------------------------------------------------------------===//
 // Supervisor Trap Setup
-//===--------------------------
+//===----------------------------------------------------------------------===//
 def : SysReg<"sstatus", 0x100>;
 def : SysReg<"sedeleg", 0x102>;
 def : SysReg<"sideleg", 0x103>;
 def : SysReg<"sie", 0x104>;
 def : SysReg<"stvec", 0x105>;
 def : SysReg<"scounteren", 0x106>;
 
-//===--------------------------
+//===----------------------------------------------------------------------===//
+// Supervisor Configuration
+//===----------------------------------------------------------------------===//
+
+def : SysReg<"senvcfg", 0x10A>;
+
+//===----------------------------------------------------------------------===//
 // Supervisor Trap Handling
-//===--------------------------
+//===----------------------------------------------------------------------===//
 def : SysReg<"sscratch", 0x140>;
 def : SysReg<"sepc", 0x141>;
 def : SysReg<"scause", 0x142>;
 let DeprecatedName = "sbadaddr" in
 def : SysReg<"stval", 0x143>;
 def : SysReg<"sip", 0x144>;
 
-//===-------------------------------------
+//===----------------------------------------------------------------------===//
 // Supervisor Protection and Translation
-//===-------------------------------------
+//===----------------------------------------------------------------------===//
 let DeprecatedName = "sptbr" in
 def : SysReg<"satp", 0x180>;
 
-//===-----------------------------
+//===----------------------------------------------------------------------===//
+// Debug/Trace Registers
+//===----------------------------------------------------------------------===//
+
+def : SysReg<"scontext", 0x5A8>;
+
+//===----------------------------------------------------------------------===//
+// Hypervisor Trap Setup
+//===----------------------------------------------------------------------===//
+
+def : SysReg<"hstatus", 0x600>;
+def : SysReg<"hedeleg", 0x602>;
+def : SysReg<"hideleg", 0x603>;
+def : SysReg<"hie", 0x604>;
+def : SysReg<"hcounteren", 0x606>;
+def : SysReg<"hgeie", 0x607>;
+
+//===----------------------------------------------------------------------===//
+// Hypervisor Trap Handling
+//===----------------------------------------------------------------------===//
+
+def : SysReg<"htval", 0x643>;
+def : SysReg<"hip", 0x644>;
+def : SysReg<"hvip", 0x645>;
+def : SysReg<"htinst", 0x64A>;
+def : SysReg<"hgeip", 0xE12>;
+
+//===----------------------------------------------------------------------===//
+// Hypervisor Configuration
+//===----------------------------------------------------------------------===//
+
+def : SysReg<"henvcfg", 0x60A>;
+let isRV32Only = 1 in
+def : SysReg<"henvcfgh", 0x61A>;
+
+//===----------------------------------------------------------------------===//
+// Hypervisor Protection and Translation
+//===----------------------------------------------------------------------===//
+
+def : SysReg<"hgatp", 0x680>;
+
+//===----------------------------------------------------------------------===//
+// Debug/Trace Registers
+//===----------------------------------------------------------------------===//
+
+def : SysReg<"hcontext", 0x6A8>;
+
+//===----------------------------------------------------------------------===//
+// Hypervisor Counter/Timer Virtualization Registers
+//===----------------------------------------------------------------------===//
+
+def : SysReg<"htimedelta", 0x605>;
+let isRV32Only = 1 in
+def : SysReg<"htimedeltah", 0x615>;
+
+//===----------------------------------------------------------------------===//
+// Virtual Supervisor Registers
+//===----------------------------------------------------------------------===//
+
+def : SysReg<"vsstatus", 0x200>;
+def : SysReg<"vsie", 0x204>;
+def : SysReg<"vstvec", 0x205>;
+def : SysReg<"vsscratch", 0x240>;
+def : SysReg<"vsepc", 0x241>;
+def : SysReg<"vscause", 0x242>;
+def : SysReg<"vstval", 0x243>;
+def : SysReg<"vsip", 0x244>;
+def : SysReg<"vsatp", 0x280>;
+
+//===----------------------------------------------------------------------===//
 // Machine Information Registers
-//===-----------------------------
+//===----------------------------------------------------------------------===//
 
 def : SysReg<"mvendorid", 0xF11>;
 def : SysReg<"marchid", 0xF12>;
 def : SysReg<"mimpid", 0xF13>;
 def : SysReg<"mhartid", 0xF14>;
+def : SysReg<"mconfigptr", 0xF15>;
 
-//===-----------------------------
+//===----------------------------------------------------------------------===//
 // Machine Trap Setup
-//===-----------------------------
+//===----------------------------------------------------------------------===//
 def : SysReg<"mstatus", 0x300>;
 def : SysReg<"misa", 0x301>;
 def : SysReg<"medeleg", 0x302>;
 def : SysReg<"mideleg", 0x303>;
 def : SysReg<"mie", 0x304>;
 def : SysReg<"mtvec", 0x305>;
 def : SysReg<"mcounteren", 0x306>;
+let isRV32Only = 1 in
+def : SysReg<"mstatush", 0x310>;
 
-//===-----------------------------
+//===----------------------------------------------------------------------===//
 // Machine Trap Handling
-//===-----------------------------
+//===----------------------------------------------------------------------===//
 def : SysReg<"mscratch", 0x340>;
 def : SysReg<"mepc", 0x341>;
 def : SysReg<"mcause", 0x342>;
 let DeprecatedName = "mbadaddr" in
 def : SysReg<"mtval", 0x343>;
 def : SysReg<"mip", 0x344>;
+def : SysReg<"mtinst", 0x34A>;
+def : SysReg<"mtval2", 0x34B>;
+
+//===----------------------------------------------------------------------===//
+// Machine Configuration
+//===----------------------------------------------------------------------===//
+
+def : SysReg<"menvcfg", 0x30A>;
+let isRV32Only = 1 in
+def : SysReg<"menvcfgh", 0x31A>;
+def : SysReg<"mseccfg", 0x747>;
+let isRV32Only = 1 in
+def : SysReg<"mseccfgh", 0x757>;
 
-//===----------------------------------
+//===----------------------------------------------------------------------===//
 // Machine Protection and Translation
-//===----------------------------------
+//===----------------------------------------------------------------------===//
 def : SysReg<"pmpcfg0", 0x3A0>;
-def : SysReg<"pmpcfg2", 0x3A2>;
-let isRV32Only = 1 in {
+let isRV32Only = 1 in
 def : SysReg<"pmpcfg1", 0x3A1>;
+def : SysReg<"pmpcfg2", 0x3A2>;
+let isRV32Only = 1 in
 def : SysReg<"pmpcfg3", 0x3A3>;
-}
+def : SysReg<"pmpcfg4", 0x3A4>;
+let isRV32Only = 1 in
+def : SysReg<"pmpcfg5", 0x3A5>;
+def : SysReg<"pmpcfg6", 0x3A6>;
+let isRV32Only = 1 in
+def : SysReg<"pmpcfg7", 0x3A7>;
+def : SysReg<"pmpcfg8", 0x3A8>;
+let isRV32Only = 1 in
+def : SysReg<"pmpcfg9", 0x3A9>;
+def : SysReg<"pmpcfg10", 0x3AA>;
+let isRV32Only = 1 in
+def : SysReg<"pmpcfg11", 0x3AB>;
+def : SysReg<"pmpcfg12", 0x3AC>;
+let isRV32Only = 1 in
+def : SysReg<"pmpcfg13", 0x3AD>;
+def : SysReg<"pmpcfg14", 0x3AE>;
+let isRV32Only = 1 in
+def : SysReg<"pmpcfg15", 0x3AF>;
 
 def : SysReg<"pmpaddr0", 0x3B0>;
 def : SysReg<"pmpaddr1", 0x3B1>;
@@ -250,11 +359,59 @@ def : SysReg<"pmpaddr12", 0x3BC>;
 def : SysReg<"pmpaddr13", 0x3BD>;
 def : SysReg<"pmpaddr14", 0x3BE>;
 def : SysReg<"pmpaddr15", 0x3BF>;
+def : SysReg<"pmpaddr16", 0x3C0>;
+def : SysReg<"pmpaddr17", 0x3C1>;
+def : SysReg<"pmpaddr18", 0x3C2>;
+def : SysReg<"pmpaddr19", 0x3C3>;
+def : SysReg<"pmpaddr20", 0x3C4>;
+def : SysReg<"pmpaddr21", 0x3C5>;
+def : SysReg<"pmpaddr22", 0x3C6>;
+def : SysReg<"pmpaddr23", 0x3C7>;
+def : SysReg<"pmpaddr24", 0x3C8>;
+def : SysReg<"pmpaddr25", 0x3C9>;
+def : SysReg<"pmpaddr26", 0x3CA>;
+def : SysReg<"pmpaddr27", 0x3CB>;
+def : SysReg<"pmpaddr28", 0x3CC>;
+def : SysReg<"pmpaddr29", 0x3CD>;
+def : SysReg<"pmpaddr30", 0x3CE>;
+def : SysReg<"pmpaddr31", 0x3CF>;
+def : SysReg<"pmpaddr32", 0x3D0>;
+def : SysReg<"pmpaddr33", 0x3D1>;
+def : SysReg<"pmpaddr34", 0x3D2>;
+def : SysReg<"pmpaddr35", 0x3D3>;
+def : SysReg<"pmpaddr36", 0x3D4>;
+def : SysReg<"pmpaddr37", 0x3D5>;
+def : SysReg<"pmpaddr38", 0x3D6>;
+def : SysReg<"pmpaddr39", 0x3D7>;
+def : SysReg<"pmpaddr40", 0x3D8>;
+def : SysReg<"pmpaddr41", 0x3D9>;
+def : SysReg<"pmpaddr42", 0x3DA>;
+def : SysReg<"pmpaddr43", 0x3DB>;
+def : SysReg<"pmpaddr44", 0x3DC>;
+def : SysReg<"pmpaddr45", 0x3DD>;
+def : SysReg<"pmpaddr46", 0x3DE>;
+def : SysReg<"pmpaddr47", 0x3DF>;
+def : SysReg<"pmpaddr48", 0x3E0>;
+def : SysReg<"pmpaddr49", 0x3E1>;
+def : SysReg<"pmpaddr50", 0x3E2>;
+def : SysReg<"pmpaddr51", 0x3E3>;
+def : SysReg<"pmpaddr52", 0x3E4>;
+def : SysReg<"pmpaddr53", 0x3E5>;
+def : SysReg<"pmpaddr54", 0x3E6>;
+def : SysReg<"pmpaddr55", 0x3E7>;
+def : SysReg<"pmpaddr56", 0x3E8>;
+def : SysReg<"pmpaddr57", 0x3E9>;
+def : SysReg<"pmpaddr58", 0x3EA>;
+def : SysReg<"pmpaddr59", 0x3EB>;
+def : SysReg<"pmpaddr60", 0x3EC>;
+def : SysReg<"pmpaddr61", 0x3ED>;
+def : SysReg<"pmpaddr62", 0x3EE>;
+def : SysReg<"pmpaddr63", 0x3EF>;
 
 
-//===--------------------------
+//===----------------------------------------------------------------------===//
 // Machine Counter and Timers
-//===--------------------------
+//===----------------------------------------------------------------------===//
 def : SysReg<"mcycle", 0xB00>;
 def : SysReg<"minstret", 0xB02>;
 
@@ -323,9 +480,9 @@ def: SysReg<"mhpmcounter30h", 0xB9E>;
 def: SysReg<"mhpmcounter31h", 0xB9F>;
 }
 
-//===--------------------------
+//===----------------------------------------------------------------------===//
 // Machine Counter Setup
-//===--------------------------
+//===----------------------------------------------------------------------===//
 let AltName = "mucounteren" in // Privileged spec v1.9.1 Name
 def : SysReg<"mcountinhibit", 0x320>;
 
@@ -359,17 +516,18 @@ def : SysReg<"mhpmevent29", 0x33D>;
 def : SysReg<"mhpmevent30", 0x33E>;
 def : SysReg<"mhpmevent31", 0x33F>;
 
-//===-----------------------------------------------
+//===----------------------------------------------------------------------===//
 // Debug/ Trace Registers (shared with Debug Mode)
-//===-----------------------------------------------
+//===----------------------------------------------------------------------===//
 def : SysReg<"tselect", 0x7A0>;
 def : SysReg<"tdata1", 0x7A1>;
 def : SysReg<"tdata2", 0x7A2>;
 def : SysReg<"tdata3", 0x7A3>;
+def : SysReg<"mcontext", 0x7A8>;
 
-//===-----------------------------------------------
+//===----------------------------------------------------------------------===//
 // Debug Mode Registers
-//===-----------------------------------------------
+//===----------------------------------------------------------------------===//
 def : SysReg<"dcsr", 0x7B0>;
 def : SysReg<"dpc", 0x7B1>;
 
@@ -379,9 +537,9 @@ let AltName = "dscratch" in
 def : SysReg<"dscratch0", 0x7B2>;
 def : SysReg<"dscratch1", 0x7B3>;
 
-//===-----------------------------------------------
+//===----------------------------------------------------------------------===//
 // User Vector CSRs
-//===-----------------------------------------------
+//===----------------------------------------------------------------------===//
 def : SysReg<"vstart", 0x008>;
 def : SysReg<"vxsat", 0x009>;
 def : SysReg<"vxrm", 0x00A>;