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ChuanqiXu9ChuanqiXu9
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[NFC] Precommit for PR53357
Due to there are other required changes in https://reviews.llvm.org/D118094, precommit these changes to ease reviewing. Including: - Remove *_thwart tests. - Remove test for (x & y) + (~x & ~y) - Fix incorrect uniitest committeed before
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+33
-196
lines changed

2 files changed

+33
-196
lines changed

‎llvm/test/Transforms/InstCombine/pr53357.ll‎

Lines changed: 32 additions & 195 deletions
Original file line numberDiff line numberDiff line change
@@ -18,27 +18,38 @@ define i32 @src(i32 %0, i32 %1) {
1818
ret i32 %6
1919
}
2020

21-
; (x & y) + ~(x | y)
22-
define i32 @src_thwart(i32 %0, i32 %1) {
23-
; CHECK-LABEL: @src_thwart(
24-
; CHECK-NEXT: [[X:%.*]] = sdiv i32 42, [[TMP0:%.*]]
25-
; CHECK-NEXT: [[Y:%.*]] = sdiv i32 43, [[TMP1:%.*]]
26-
; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[Y]], [[X]]
27-
; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[Y]], [[X]]
28-
; CHECK-NEXT: [[TMP5:%.*]] = xor i32 [[TMP4]], -1
29-
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP3]], [[TMP5]]
30-
; CHECK-NEXT: ret i32 [[TMP6]]
31-
;
32-
%x = sdiv i32 42, %0 ; thwart complexity-based canonicalization
33-
%y = sdiv i32 43, %1 ; thwart complexity-based canonicalization
34-
%3 = and i32 %y, %x
35-
%4 = or i32 %y, %x
36-
%5 = xor i32 %4, -1
37-
%6 = add i32 %3, %5
38-
ret i32 %6
21+
; vector version of src
22+
define <2 x i32> @src_vec(<2 x i32> %0, <2 x i32> %1) {
23+
; CHECK-LABEL: @src_vec(
24+
; CHECK-NEXT: [[TMP3:%.*]] = and <2 x i32> [[TMP1:%.*]], [[TMP0:%.*]]
25+
; CHECK-NEXT: [[TMP4:%.*]] = or <2 x i32> [[TMP1]], [[TMP0]]
26+
; CHECK-NEXT: [[TMP5:%.*]] = xor <2 x i32> [[TMP4]], <i32 -1, i32 -1>
27+
; CHECK-NEXT: [[TMP6:%.*]] = add <2 x i32> [[TMP3]], [[TMP5]]
28+
; CHECK-NEXT: ret <2 x i32> [[TMP6]]
29+
;
30+
%3 = and <2 x i32> %1, %0
31+
%4 = or <2 x i32> %1, %0
32+
%5 = xor <2 x i32> %4, <i32 -1, i32 -1>
33+
%6 = add <2 x i32> %3, %5
34+
ret <2 x i32> %6
35+
}
36+
37+
; vector version of src with undef values
38+
define <2 x i32> @src_vec_undef(<2 x i32> %0, <2 x i32> %1) {
39+
; CHECK-LABEL: @src_vec_undef(
40+
; CHECK-NEXT: [[TMP3:%.*]] = and <2 x i32> [[TMP1:%.*]], [[TMP0:%.*]]
41+
; CHECK-NEXT: [[TMP4:%.*]] = or <2 x i32> [[TMP1]], [[TMP0]]
42+
; CHECK-NEXT: [[TMP5:%.*]] = xor <2 x i32> [[TMP4]], <i32 -1, i32 undef>
43+
; CHECK-NEXT: [[TMP6:%.*]] = add <2 x i32> [[TMP3]], [[TMP5]]
44+
; CHECK-NEXT: ret <2 x i32> [[TMP6]]
45+
;
46+
%3 = and <2 x i32> %1, %0
47+
%4 = or <2 x i32> %1, %0
48+
%5 = xor <2 x i32> %4, <i32 -1, i32 undef>
49+
%6 = add <2 x i32> %3, %5
50+
ret <2 x i32> %6
3951
}
4052

41-
4253
; (x & y) + ~(y | x)
4354
define i32 @src2(i32 %0, i32 %1) {
4455
; CHECK-LABEL: @src2(
@@ -55,26 +66,6 @@ define i32 @src2(i32 %0, i32 %1) {
5566
ret i32 %6
5667
}
5768

58-
; (x & y) + ~(y | x)
59-
define i32 @src2_thwart(i32 %0, i32 %1) {
60-
; CHECK-LABEL: @src2_thwart(
61-
; CHECK-NEXT: [[X:%.*]] = sdiv i32 42, [[TMP0:%.*]]
62-
; CHECK-NEXT: [[Y:%.*]] = sdiv i32 43, [[TMP1:%.*]]
63-
; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[Y]], [[X]]
64-
; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[X]], [[Y]]
65-
; CHECK-NEXT: [[TMP5:%.*]] = xor i32 [[TMP4]], -1
66-
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP3]], [[TMP5]]
67-
; CHECK-NEXT: ret i32 [[TMP6]]
68-
;
69-
%x = sdiv i32 42, %0 ; thwart complexity-based canonicalization
70-
%y = sdiv i32 43, %1 ; thwart complexity-based canonicalization
71-
%3 = and i32 %y, %x
72-
%4 = or i32 %x, %y
73-
%5 = xor i32 %4, -1
74-
%6 = add i32 %3, %5
75-
ret i32 %6
76-
}
77-
7869
; (x & y) + (~x & ~y)
7970
define i32 @src3(i32 %0, i32 %1) {
8071
; CHECK-LABEL: @src3(
@@ -92,27 +83,6 @@ define i32 @src3(i32 %0, i32 %1) {
9283
ret i32 %7
9384
}
9485

95-
; (x & y) + (~x & ~y)
96-
define i32 @src3_thwart(i32 %0, i32 %1) {
97-
; CHECK-LABEL: @src3_thwart(
98-
; CHECK-NEXT: [[X:%.*]] = sdiv i32 42, [[TMP0:%.*]]
99-
; CHECK-NEXT: [[Y:%.*]] = sdiv i32 43, [[TMP1:%.*]]
100-
; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[Y]], [[X]]
101-
; CHECK-NEXT: [[DOTDEMORGAN:%.*]] = or i32 [[X]], [[Y]]
102-
; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[DOTDEMORGAN]], -1
103-
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP3]], [[TMP4]]
104-
; CHECK-NEXT: ret i32 [[TMP5]]
105-
;
106-
%x = sdiv i32 42, %0 ; thwart complexity-based canonicalization
107-
%y = sdiv i32 43, %1 ; thwart complexity-based canonicalization
108-
%3 = and i32 %y, %x
109-
%4 = xor i32 %x, -1
110-
%5 = xor i32 %y, -1
111-
%6 = and i32 %4, %5
112-
%7 = add i32 %3, %6
113-
ret i32 %7
114-
}
115-
11686
; ~(x | y) + (y & x)
11787
define i32 @src4(i32 %0, i32 %1) {
11888
; CHECK-LABEL: @src4(
@@ -129,26 +99,6 @@ define i32 @src4(i32 %0, i32 %1) {
12999
ret i32 %6
130100
}
131101

132-
; ~(x | y) + (y & x)
133-
define i32 @src4_thwart(i32 %0, i32 %1) {
134-
; CHECK-LABEL: @src4_thwart(
135-
; CHECK-NEXT: [[X:%.*]] = sdiv i32 42, [[TMP0:%.*]]
136-
; CHECK-NEXT: [[Y:%.*]] = sdiv i32 43, [[TMP1:%.*]]
137-
; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[X]], [[Y]]
138-
; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[Y]], [[X]]
139-
; CHECK-NEXT: [[TMP5:%.*]] = xor i32 [[TMP4]], -1
140-
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP3]], [[TMP5]]
141-
; CHECK-NEXT: ret i32 [[TMP6]]
142-
;
143-
%x = sdiv i32 42, %0 ; thwart complexity-based canonicalization
144-
%y = sdiv i32 43, %1 ; thwart complexity-based canonicalization
145-
%3 = and i32 %x, %y
146-
%4 = or i32 %y, %x
147-
%5 = xor i32 %4, -1
148-
%6 = add i32 %3, %5
149-
ret i32 %6
150-
}
151-
152102
; ~(x | y) + (x & y)
153103
define i32 @src5(i32 %0, i32 %1) {
154104
; CHECK-LABEL: @src5(
@@ -165,122 +115,9 @@ define i32 @src5(i32 %0, i32 %1) {
165115
ret i32 %6
166116
}
167117

168-
; ~(x | y) + (x & y)
169-
define i32 @src5_thwart(i32 %0, i32 %1) {
170-
; CHECK-LABEL: @src5_thwart(
171-
; CHECK-NEXT: [[X:%.*]] = sdiv i32 42, [[TMP0:%.*]]
172-
; CHECK-NEXT: [[Y:%.*]] = sdiv i32 43, [[TMP1:%.*]]
173-
; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[Y]], [[X]]
174-
; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
175-
; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[Y]], [[X]]
176-
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], [[TMP4]]
177-
; CHECK-NEXT: ret i32 [[TMP6]]
178-
;
179-
%x = sdiv i32 42, %0 ; thwart complexity-based canonicalization
180-
%y = sdiv i32 43, %1 ; thwart complexity-based canonicalization
181-
%3 = or i32 %y, %x
182-
%4 = xor i32 %3, -1
183-
%5 = and i32 %y, %x
184-
%6 = add i32 %4, %5
185-
ret i32 %6
186-
}
187-
188-
; (x & y) + (~x & ~y)
189-
define i32 @src6(i32 %0, i32 %1) {
190-
; CHECK-LABEL: @src6(
191-
; CHECK-NEXT: [[DOTDEMORGAN:%.*]] = or i32 [[TMP0:%.*]], [[TMP1:%.*]]
192-
; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[DOTDEMORGAN]], -1
193-
; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP1]], [[TMP0]]
194-
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP3]]
195-
; CHECK-NEXT: ret i32 [[TMP5]]
196-
;
197-
%3 = xor i32 %0, -1
198-
%4 = xor i32 %1, -1
199-
%5 = and i32 %3, %4
200-
%6 = and i32 %1, %0
201-
%7 = add i32 %5, %6
202-
ret i32 %7
203-
}
204-
205-
; (x & y) + (~x & ~y)
206-
define i32 @src6_thwart(i32 %0, i32 %1) {
207-
; CHECK-LABEL: @src6_thwart(
208-
; CHECK-NEXT: [[X:%.*]] = sdiv i32 42, [[TMP0:%.*]]
209-
; CHECK-NEXT: [[Y:%.*]] = sdiv i32 43, [[TMP1:%.*]]
210-
; CHECK-NEXT: [[DOTDEMORGAN:%.*]] = or i32 [[X]], [[Y]]
211-
; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[DOTDEMORGAN]], -1
212-
; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[Y]], [[X]]
213-
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP3]]
214-
; CHECK-NEXT: ret i32 [[TMP5]]
215-
;
216-
%x = sdiv i32 42, %0 ; thwart complexity-based canonicalization
217-
%y = sdiv i32 43, %1 ; thwart complexity-based canonicalization
218-
%3 = xor i32 %x, -1
219-
%4 = xor i32 %y, -1
220-
%5 = and i32 %3, %4
221-
%6 = and i32 %y, %x
222-
%7 = add i32 %5, %6
223-
ret i32 %7
224-
}
225-
226-
; vector version of src6
227-
define <2 x i32> @src6_vec(<2 x i32> %0, <2 x i32> %1) {
228-
; CHECK-LABEL: @src6_vec(
229-
; CHECK-NEXT: [[DOTDEMORGAN:%.*]] = or <2 x i32> [[TMP0:%.*]], [[TMP1:%.*]]
230-
; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[DOTDEMORGAN]], <i32 -1, i32 -1>
231-
; CHECK-NEXT: [[TMP4:%.*]] = and <2 x i32> [[TMP1]], [[TMP0]]
232-
; CHECK-NEXT: [[TMP5:%.*]] = add <2 x i32> [[TMP4]], [[TMP3]]
233-
; CHECK-NEXT: ret <2 x i32> [[TMP5]]
234-
;
235-
%3 = xor <2 x i32> %0, <i32 -1, i32 -1>
236-
%4 = xor <2 x i32> %1, <i32 -1, i32 -1>
237-
%5 = and <2 x i32> %3, %4
238-
%6 = and <2 x i32> %1, %0
239-
%7 = add <2 x i32> %5, %6
240-
ret <2 x i32> %7
241-
}
242-
243-
; check the transformation is still valid with undef
244-
define <2 x i32> @src6_vec_undef(<2 x i32> %0, <2 x i32> %1) {
245-
; CHECK-LABEL: @src6_vec_undef(
246-
; CHECK-NEXT: [[DOTDEMORGAN:%.*]] = or <2 x i32> [[TMP0:%.*]], [[TMP1:%.*]]
247-
; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[DOTDEMORGAN]], <i32 -1, i32 -1>
248-
; CHECK-NEXT: [[TMP4:%.*]] = and <2 x i32> [[TMP1]], [[TMP0]]
249-
; CHECK-NEXT: [[TMP5:%.*]] = add <2 x i32> [[TMP4]], [[TMP3]]
250-
; CHECK-NEXT: ret <2 x i32> [[TMP5]]
251-
;
252-
%3 = xor <2 x i32> %0, <i32 -1, i32 undef>
253-
%4 = xor <2 x i32> %1, <i32 -1, i32 -1>
254-
%5 = and <2 x i32> %3, %4
255-
%6 = and <2 x i32> %1, %0
256-
%7 = add <2 x i32> %5, %6
257-
ret <2 x i32> %7
258-
}
259-
260-
; vector version of src6 with thwart complexity-based canonicalization
261-
define <2 x i32> @src6_vec_thwart(<2 x i32> %0, <2 x i32> %1) {
262-
; CHECK-LABEL: @src6_vec_thwart(
263-
; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i32> <i32 42, i32 43>, [[TMP0:%.*]]
264-
; CHECK-NEXT: [[Y:%.*]] = sdiv <2 x i32> <i32 43, i32 42>, [[TMP1:%.*]]
265-
; CHECK-NEXT: [[DOTDEMORGAN:%.*]] = or <2 x i32> [[X]], [[Y]]
266-
; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[DOTDEMORGAN]], <i32 -1, i32 -1>
267-
; CHECK-NEXT: [[TMP4:%.*]] = and <2 x i32> [[Y]], [[X]]
268-
; CHECK-NEXT: [[TMP5:%.*]] = add <2 x i32> [[TMP4]], [[TMP3]]
269-
; CHECK-NEXT: ret <2 x i32> [[TMP5]]
270-
;
271-
%x = sdiv <2 x i32> <i32 42, i32 43>, %0 ; thwart complexity-based canonicalization
272-
%y = sdiv <2 x i32> <i32 43, i32 42>, %1 ; thwart complexity-based canonicalization
273-
%3 = xor <2 x i32> %x, <i32 -1, i32 -1>
274-
%4 = xor <2 x i32> %y, <i32 -1, i32 -1>
275-
%5 = and <2 x i32> %3, %4
276-
%6 = and <2 x i32> %y, %x
277-
%7 = add <2 x i32> %5, %6
278-
ret <2 x i32> %7
279-
}
280-
281118
; (a & b) + ~(c | d)
282-
define i32 @src7(i32 %0, i32 %1, i32 %2, i32 %3) {
283-
; CHECK-LABEL: @src7(
119+
define i32 @src6(i32 %0, i32 %1, i32 %2, i32 %3) {
120+
; CHECK-LABEL: @src6(
284121
; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0:%.*]], [[TMP1:%.*]]
285122
; CHECK-NEXT: [[TMP6:%.*]] = or i32 [[TMP2:%.*]], [[TMP3:%.*]]
286123
; CHECK-NEXT: [[TMP7:%.*]] = xor i32 [[TMP6]], -1

‎llvm/unittests/Analysis/ValueTrackingTest.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1737,7 +1737,7 @@ TEST_F(ValueTrackingTest, HaveNoCommonBitsSet) {
17371737
ret i32 %Ret
17381738
})");
17391739

1740-
F = M->getFunction("test");
1740+
auto *F = M->getFunction("test");
17411741
auto *LHS = findInstructionByNameOrNull(F, "LHS");
17421742
auto *RHS = findInstructionByNameOrNull(F, "RHS");
17431743

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