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1 parent 4aeec72 commit e1d2756Copy full SHA for e1d2756
test/IRGen/variadic_generic_tuples.sil
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// RUN: %target-swift-frontend -emit-ir %s | %FileCheck %s
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+// Temporarily disable on arm64e (rdar://127874706)
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+// UNSUPPORTED: CPU=arm64e
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+
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sil_stage canonical
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import Builtin
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