Merge pull request #41656 from MillerTechnologyPeru/feature/ppc32

[stdlib] Added PowerPC 32-bit support

Author: CodaFi

CMakeLists.txt

@@ -737,6 +737,8 @@ else()
     endif()
   elseif("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "ppc64")
     set(SWIFT_HOST_VARIANT_ARCH_default "powerpc64")
+  elseif("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "ppc")
+    set(SWIFT_HOST_VARIANT_ARCH_default "powerpc")
   elseif("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "ppc64le")
     set(SWIFT_HOST_VARIANT_ARCH_default "powerpc64le")
   elseif("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "s390x")

cmake/modules/SwiftConfigureSDK.cmake

@@ -327,7 +327,7 @@ macro(configure_sdk_unix name architectures)
           set(SWIFT_SDK_LINUX_ARCH_${arch}_TRIPLE "${arch}-unknown-linux-gnueabi")
         elseif(arch MATCHES "(armv6|armv7)")
           set(SWIFT_SDK_LINUX_ARCH_${arch}_TRIPLE "${arch}-unknown-linux-gnueabihf")
-        elseif(arch MATCHES "(aarch64|i686|powerpc64|powerpc64le|s390x|x86_64)")
+        elseif(arch MATCHES "(aarch64|i686|powerpc|powerpc64|powerpc64le|s390x|x86_64)")
           set(SWIFT_SDK_LINUX_ARCH_${arch}_TRIPLE "${arch}-unknown-linux-gnu")
         else()
           message(FATAL_ERROR "unknown arch for ${prefix}: ${arch}")

cmake/modules/SwiftSetIfArchBitness.cmake

@@ -15,7 +15,8 @@ function(set_if_arch_bitness var_name)
      "${SIA_ARCH}" STREQUAL "armv7k" OR
      "${SIA_ARCH}" STREQUAL "arm64_32" OR
      "${SIA_ARCH}" STREQUAL "armv7s" OR
-     "${SIA_ARCH}" STREQUAL "wasm32")
+     "${SIA_ARCH}" STREQUAL "wasm32" OR
+     "${SIA_ARCH}" STREQUAL "powerpc")
     set("${var_name}" "${SIA_CASE_32_BIT}" PARENT_SCOPE)
   elseif("${SIA_ARCH}" STREQUAL "x86_64" OR
          "${SIA_ARCH}" STREQUAL "amd64" OR

lib/Basic/LangOptions.cpp

@@ -62,6 +62,7 @@ static const SupportedConditionalValue SupportedConditionalCompilationArches[] =
   "arm64_32",
   "i386",
   "x86_64",
+  "powerpc",
   "powerpc64",
   "powerpc64le",
   "s390x",
@@ -312,6 +313,9 @@ std::pair<bool, bool> LangOptions::setTarget(llvm::Triple triple) {
       addPlatformConditionValue(PlatformConditionKind::Arch, "arm64");
     }
     break;
+  case llvm::Triple::ArchType::ppc:
+    addPlatformConditionValue(PlatformConditionKind::Arch, "powerpc");
+    break;
   case llvm::Triple::ArchType::ppc64:
     addPlatformConditionValue(PlatformConditionKind::Arch, "powerpc64");
     break;

lib/IRGen/SwiftTargetInfo.cpp

@@ -144,6 +144,13 @@ static void configureARM(IRGenModule &IGM, const llvm::Triple &triple,
   setToMask(target.IsObjCPointerBit, 32, SWIFT_ABI_ARM_IS_OBJC_BIT);
 }
 
+/// Configures target-specific information for powerpc platforms.
+static void configurePowerPC(IRGenModule &IGM, const llvm::Triple &triple,
+                               SwiftTargetInfo &target) {
+  setToMask(target.PointerSpareBits, 32,
+            SWIFT_ABI_POWERPC_SWIFT_SPARE_BITS_MASK);
+}
+
 /// Configures target-specific information for powerpc64 platforms.
 static void configurePowerPC64(IRGenModule &IGM, const llvm::Triple &triple,
                                SwiftTargetInfo &target) {
@@ -220,6 +227,10 @@ SwiftTargetInfo SwiftTargetInfo::get(IRGenModule &IGM) {
     else
       configureARM64(IGM, triple, target);
     break;
+  
+  case llvm::Triple::ppc:
+    configurePowerPC(IGM, triple, target);
+    break;
 
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:

stdlib/public/SwiftShims/HeapObject.h

@@ -202,6 +202,9 @@ static_assert(alignof(HeapObject) == alignof(void*),
       (defined(__arm64__) && (__POINTER_WIDTH__ == 32))
 #define _swift_abi_SwiftSpareBitsMask                                          \
   (__swift_uintptr_t) SWIFT_ABI_ARM_SWIFT_SPARE_BITS_MASK
+#elif defined(__ppc__)
+#define _swift_abi_SwiftSpareBitsMask                                          \
+  (__swift_uintptr_t) SWIFT_ABI_POWERPC_SWIFT_SPARE_BITS_MASK
 #else
 #define _swift_abi_SwiftSpareBitsMask                                          \
   (__swift_uintptr_t) SWIFT_ABI_DEFAULT_SWIFT_SPARE_BITS_MASK

stdlib/public/SwiftShims/RefCount.h

@@ -1319,7 +1319,12 @@ class HeapObjectSideTableEntry {
 
   public:
   HeapObjectSideTableEntry(HeapObject *newObject)
-    : object(newObject), refCounts()
+    : object(newObject), 
+#if __arm__ || __powerpc__ // https://bugs.swift.org/browse/SR-5846
+   refCounts(SideTableRefCounts::Initialized)
+#else
+   refCounts()
+#endif
   { }
 
 #pragma clang diagnostic push

stdlib/public/SwiftShims/System.h

@@ -173,6 +173,11 @@
 #define SWIFT_ABI_ARM64_OBJC_WEAK_REFERENCE_MARKER_VALUE \
   (1<<SWIFT_ABI_ARM64_OBJC_NUM_RESERVED_LOW_BITS)
 
+/*********************************** powerpc ********************************/
+
+// Heap objects are pointer-aligned, so the low two bits are unused.
+#define SWIFT_ABI_POWERPC_SWIFT_SPARE_BITS_MASK 0x00000003U
+
 /*********************************** powerpc64 ********************************/
 
 // Heap objects are pointer-aligned, so the low three bits are unused.

stdlib/public/core/AtomicInt.swift.gyb

@@ -65,7 +65,7 @@ internal func _swift_stdlib_atomicCompareExchangeStrongInt(
   object target: UnsafeMutablePointer<Int>,
   expected: UnsafeMutablePointer<Int>,
   desired: Int) -> Bool {
-#if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32)
+#if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32) || arch(powerpc)
   let (oldValue, won) = Builtin.cmpxchg_seqcst_seqcst_Int32(
     target._rawValue, expected.pointee._value, desired._value)
 #elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
@@ -82,7 +82,7 @@ internal func _swift_stdlib_atomicCompareExchangeStrongInt(
 public // Existing uses outside stdlib
 func _swift_stdlib_atomicLoadInt(
   object target: UnsafeMutablePointer<Int>) -> Int {
-#if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32)
+#if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32) || arch(powerpc)
   let value = Builtin.atomicload_seqcst_Int32(target._rawValue)
   return Int(value)
 #elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
@@ -95,7 +95,7 @@ func _swift_stdlib_atomicLoadInt(
 internal func _swift_stdlib_atomicStoreInt(
   object target: UnsafeMutablePointer<Int>,
   desired: Int) {
-#if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32)
+#if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32) || arch(powerpc)
   Builtin.atomicstore_seqcst_Int32(target._rawValue, desired._value)
 #elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
   Builtin.atomicstore_seqcst_Int64(target._rawValue, desired._value)
@@ -111,7 +111,7 @@ func _swift_stdlib_atomicFetch${operation}Int(
   object target: UnsafeMutablePointer<Int>,
   operand: Int) -> Int {
   let rawTarget = UnsafeMutableRawPointer(target)
-#if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32)
+#if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32) || arch(powerpc)
   let value = _swift_stdlib_atomicFetch${operation}Int32(
     object: rawTarget.assumingMemoryBound(to: Int32.self),
     operand: Int32(operand))

stdlib/public/core/Builtin.swift

@@ -394,7 +394,7 @@ internal var _objectPointerLowSpareBitShift: UInt {
     }
 }
 
-#if arch(i386) || arch(arm) || arch(wasm32) || arch(powerpc64) || arch(
+#if arch(i386) || arch(arm) || arch(wasm32) || arch(powerpc) || arch(powerpc64) || arch(
   powerpc64le) || arch(s390x) || arch(arm64_32)
 @inlinable
 internal var _objectPointerIsObjCBit: UInt {