@@ -34,51 +34,3 @@ func repeating${n}_mask${bits}(_ scalar: Bool) -> SIMDMask<SIMD${n}<Int${bits}>>
3434% end
3535% end
3636% end
37-
38- func concat8 x8 ( _ a: SIMDMask < SIMD8 < Int8 > > , _ b: SIMDMask < SIMD8 < Int8 > > ) -> SIMDMask< SIMD16 < Int8>> {
39- SIMDMask ( lowHalf: a, highHalf: b)
40- }
41- // CHECK: s20SIMDMaskInitializers9concat8x8ys0A0Vys6SIMD16Vys4Int8VGGADys5SIMD8VyAHGG_ANtF:
42- // CHECKO-arm64-NEXT: mov.d v0[1], v1[0]
43- // CHECKO-arm64-NEXT: ret
44- // CHECKO-x86_64: punpcklqdq
45-
46- func concat16 x8 ( _ a: SIMDMask < SIMD16 < Int8 > > , _ b: SIMDMask < SIMD16 < Int8 > > ) -> SIMDMask< SIMD32 < Int8>> {
47- SIMDMask ( lowHalf: a, highHalf: b)
48- }
49- // CHECK: s20SIMDMaskInitializers10concat16x8ys0A0Vys6SIMD32Vys4Int8VGGADys6SIMD16VyAHGG_ANtF:
50- // CHECKO-arm64-NEXT: ret
51-
52- func concat4 x16 ( _ a: SIMDMask < SIMD4 < Int16 > > , _ b: SIMDMask < SIMD4 < Int16 > > ) -> SIMDMask< SIMD8 < Int16>> {
53- SIMDMask ( lowHalf: a, highHalf: b)
54- }
55- // CHECK: s20SIMDMaskInitializers10concat4x16ys0A0Vys5SIMD8Vys5Int16VGGADys5SIMD4VyAHGG_ANtF:
56- // CHECKO-arm64-NEXT: mov.d v0[1], v1[0]
57- // CHECKO-arm64-NEXT: ret
58- // CHECKO-x86_64: punpcklqdq
59-
60- func concat8 x16 ( _ a: SIMDMask < SIMD8 < Int16 > > , _ b: SIMDMask < SIMD8 < Int16 > > ) -> SIMDMask< SIMD16 < Int16>> {
61- SIMDMask ( lowHalf: a, highHalf: b)
62- }
63- // CHECK: s20SIMDMaskInitializers10concat8x16ys0A0Vys6SIMD16Vys5Int16VGGADys5SIMD8VyAHGG_ANtF:
64- // CHECKO-arm64-NEXT: ret
65-
66- func concat2 x32 ( _ a: SIMDMask < SIMD2 < Int32 > > , _ b: SIMDMask < SIMD2 < Int32 > > ) -> SIMDMask< SIMD4 < Int32>> {
67- SIMDMask ( lowHalf: a, highHalf: b)
68- }
69- // CHECK: s20SIMDMaskInitializers10concat2x32ys0A0Vys5SIMD4Vys5Int32VGGADys5SIMD2VyAHGG_ANtF:
70- // CHECKO-arm64-NEXT: mov.d v0[1], v1[0]
71- // CHECKO-arm64-NEXT: ret
72- // CHECKO-x86_64: punpcklqdq
73-
74- func concat4 x32 ( _ a: SIMDMask < SIMD4 < Int32 > > , _ b: SIMDMask < SIMD4 < Int32 > > ) -> SIMDMask< SIMD8 < Int32>> {
75- SIMDMask ( lowHalf: a, highHalf: b)
76- }
77- // CHECK: s20SIMDMaskInitializers10concat4x32ys0A0Vys5SIMD8Vys5Int32VGGADys5SIMD4VyAHGG_ANtF:
78- // CHECKO-arm64-NEXT: ret
79-
80- func concat2 x64 ( _ a: SIMDMask < SIMD2 < Int64 > > , _ b: SIMDMask < SIMD2 < Int64 > > ) -> SIMDMask< SIMD4 < Int64>> {
81- SIMDMask ( lowHalf: a, highHalf: b)
82- }
83- // CHECK: s20SIMDMaskInitializers10concat2x64ys0A0Vys5SIMD4Vys5Int64VGGADys5SIMD2VyAHGG_ANtF:
84- // CHECKO-arm64-NEXT: ret
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