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[Loads] Add additional test coverage for assumptions.
(cherry picked from commit 4efde3c)
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‎llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "scalar.ph:" --version 5
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; RUN: opt -p loop-vectorize -force-vector-width=2 -S %s | FileCheck %s
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define void @loop_guard_on_assume_needed_to_prove_dereferenceable_ptr_arg_noundef(i64 %x, ptr noalias noundef %A, ptr noalias %B, ptr noalias %C) nofree nosync {
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; CHECK-LABEL: define void @loop_guard_on_assume_needed_to_prove_dereferenceable_ptr_arg_noundef(
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; CHECK-SAME: i64 [[X:%.*]], ptr noalias noundef [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 4), "dereferenceable"(ptr [[A]], i64 [[X]]) ]
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; CHECK-NEXT: [[C_X:%.*]] = icmp uge i64 [[X]], 128
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; CHECK-NEXT: br i1 [[C_X]], label %[[LOOP_HEADER_PREHEADER:.*]], [[EXIT:label %.*]]
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; CHECK: [[LOOP_HEADER_PREHEADER]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[TMP0]], i32 0
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP3]], align 4
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[WIDE_LOAD]], zeroinitializer
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[TMP2]], i32 0
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; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x i32>, ptr [[TMP4]], align 4
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; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[WIDE_LOAD1]]
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; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i32 0
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; CHECK-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP6]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32
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; CHECK-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 true, [[EXIT_LOOPEXIT:label %.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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;
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entry:
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call void @llvm.assume(i1 true) [ "align"(ptr %A, i64 4), "dereferenceable"(ptr %A, i64 %x) ]
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%c.x = icmp uge i64 %x, 128
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br i1 %c.x, label %loop.header, label %exit
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loop.header:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%gep.b = getelementptr i32, ptr %B, i64 %iv
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%l.b = load i32, ptr %gep.b, align 4
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%c.1 = icmp eq i32 %l.b, 0
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br i1 %c.1, label %loop.latch, label %loop.then
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loop.then:
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%gep.a = getelementptr i32, ptr %A, i64 %iv
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%l.a = load i32, ptr %gep.a, align 4
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br label %loop.latch
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loop.latch:
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%merge = phi i32 [ %l.a, %loop.then ], [ %l.b, %loop.header ]
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%gep.c = getelementptr inbounds i32, ptr %C, i64 %iv
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store i32 %merge, ptr %gep.c, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%ec = icmp eq i64 %iv.next, 32
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br i1 %ec, label %exit, label %loop.header
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exit:
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ret void
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}
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define void @loop_guard_on_assume_needed_to_prove_dereferenceable(i64 %x, ptr noalias %A, ptr noalias %B, ptr noalias %C) nofree nosync {
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; CHECK-LABEL: define void @loop_guard_on_assume_needed_to_prove_dereferenceable(
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; CHECK-SAME: i64 [[X:%.*]], ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: call void @llvm.assume(i1 true) [ "noundef"(ptr [[A]]), "align"(ptr [[A]], i64 4), "dereferenceable"(ptr [[A]], i64 [[X]]) ]
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; CHECK-NEXT: [[C_X:%.*]] = icmp uge i64 [[X]], 128
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; CHECK-NEXT: br i1 [[C_X]], label %[[LOOP_HEADER_PREHEADER:.*]], [[EXIT:label %.*]]
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; CHECK: [[LOOP_HEADER_PREHEADER]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE2:.*]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[TMP0]], i32 0
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP13]], align 4
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; CHECK-NEXT: [[TMP16:%.*]] = icmp eq <2 x i32> [[WIDE_LOAD]], zeroinitializer
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i1> [[TMP16]], splat (i1 true)
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; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i1> [[TMP1]], i32 0
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; CHECK-NEXT: br i1 [[TMP2]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
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; CHECK: [[PRED_LOAD_IF]]:
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; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 0
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
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; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> poison, i32 [[TMP5]], i32 0
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; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
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; CHECK: [[PRED_LOAD_CONTINUE]]:
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; CHECK-NEXT: [[TMP7:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP6]], %[[PRED_LOAD_IF]] ]
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; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i1> [[TMP1]], i32 1
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; CHECK-NEXT: br i1 [[TMP8]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2]]
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; CHECK: [[PRED_LOAD_IF1]]:
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; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 1
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; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP9]]
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; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
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; CHECK-NEXT: [[TMP12:%.*]] = insertelement <2 x i32> [[TMP7]], i32 [[TMP11]], i32 1
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; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE2]]
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; CHECK: [[PRED_LOAD_CONTINUE2]]:
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; CHECK-NEXT: [[TMP18:%.*]] = phi <2 x i32> [ [[TMP7]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], %[[PRED_LOAD_IF1]] ]
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; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP16]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[TMP18]]
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; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i32 0
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; CHECK-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP17]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32
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; CHECK-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 true, [[EXIT_LOOPEXIT:label %.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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;
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entry:
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call void @llvm.assume(i1 true) [ "noundef"(ptr %A), "align"(ptr %A, i64 4), "dereferenceable"(ptr %A, i64 %x) ]
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%c.x = icmp uge i64 %x, 128
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br i1 %c.x, label %loop.header, label %exit
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loop.header:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%gep.b = getelementptr i32, ptr %B, i64 %iv
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%l.b = load i32, ptr %gep.b, align 4
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%c.1 = icmp eq i32 %l.b, 0
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br i1 %c.1, label %loop.latch, label %loop.then
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loop.then:
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%gep.a = getelementptr i32, ptr %A, i64 %iv
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%l.a = load i32, ptr %gep.a, align 4
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br label %loop.latch
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loop.latch:
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%merge = phi i32 [ %l.a, %loop.then ], [ %l.b, %loop.header ]
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%gep.c = getelementptr inbounds i32, ptr %C, i64 %iv
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store i32 %merge, ptr %gep.c, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%ec = icmp eq i64 %iv.next, 32
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br i1 %ec, label %exit, label %loop.header
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exit:
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ret void
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}
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define void @loop_guard_on_trip_count_needed_to_prove_dereferenceable(i32 %x, ptr noalias dereferenceable(128) align 4 %A, ptr noalias %B, ptr noalias %C) {
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; CHECK-LABEL: define void @loop_guard_on_trip_count_needed_to_prove_dereferenceable(
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; CHECK-SAME: i32 [[X:%.*]], ptr noalias align 4 dereferenceable(128) [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[C_X:%.*]] = icmp sgt i32 [[X]], 0
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; CHECK-NEXT: br i1 [[C_X]], label %[[PH:.*]], [[EXIT:label %.*]]
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; CHECK: [[PH]]:
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; CHECK-NEXT: [[N:%.*]] = tail call i32 @llvm.smin.i32(i32 [[X]], i32 31)
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; CHECK-NEXT: [[N_EXT:%.*]] = zext i32 [[N]] to i64
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N_EXT]], 2
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_EXT]], 2
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; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N_EXT]], [[N_MOD_VF]]
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[TMP0]], i32 0
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP3]], align 4
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[WIDE_LOAD]], zeroinitializer
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[TMP2]], i32 0
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; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x i32>, ptr [[TMP4]], align 4
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; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[WIDE_LOAD1]]
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; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i32 0
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; CHECK-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP6]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_EXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[CMP_N]], [[EXIT_LOOPEXIT:label %.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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;
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entry:
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%c.x = icmp sgt i32 %x, 0
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br i1 %c.x, label %ph, label %exit
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ph:
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%n = tail call i32 @llvm.smin.i32(i32 %x, i32 31)
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%n.ext = zext i32 %n to i64
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br label %loop.header
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loop.header:
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%iv = phi i64 [ 0, %ph ], [ %iv.next, %loop.latch ]
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%gep.b = getelementptr i32, ptr %B, i64 %iv
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%l.b = load i32, ptr %gep.b, align 4
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%c.1 = icmp eq i32 %l.b, 0
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br i1 %c.1, label %loop.latch, label %loop.then
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loop.then:
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%gep.a = getelementptr i32, ptr %A, i64 %iv
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%l.a = load i32, ptr %gep.a, align 4
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br label %loop.latch
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loop.latch:
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%merge = phi i32 [ %l.a, %loop.then ], [ %l.b, %loop.header ]
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%gep.c = getelementptr inbounds i32, ptr %C, i64 %iv
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store i32 %merge, ptr %gep.c, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%ec = icmp eq i64 %iv.next, %n.ext
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br i1 %ec, label %exit, label %loop.header
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exit:
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ret void
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}
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declare i32 @llvm.smin.i32(i32, i32)

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