@@ -4969,16 +4969,13 @@ typedef struct
49694969 tmpreg = READ_BIT (RCC -> APB1ENR , RCC_APB1ENR_RTCAPBEN );\
49704970 UNUSED (tmpreg ); \
49714971 } while (0U )
4972- #if defined(STM32F412Zx ) || defined(STM32F412Vx ) || defined(STM32F412Rx ) || defined(STM32F413xx ) || defined(STM32F423xx )
49734972#define __HAL_RCC_USART3_CLK_ENABLE () do { \
49744973 __IO uint32_t tmpreg = 0x00U; \
49754974 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
49764975 /* Delay after an RCC peripheral clock enabling */ \
49774976 tmpreg = READ_BIT (RCC -> APB1ENR , RCC_APB1ENR_USART3EN );\
49784977 UNUSED (tmpreg ); \
49794978 } while (0U )
4980- #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
4981-
49824979#if defined(STM32F413xx ) || defined(STM32F423xx )
49834980#define __HAL_RCC_UART4_CLK_ENABLE () do { \
49844981 __IO uint32_t tmpreg = 0x00U; \
@@ -5098,9 +5095,7 @@ typedef struct
50985095#endif /* STM32F413xx || STM32F423xx */
50995096#define __HAL_RCC_RTCAPB_CLK_DISABLE () (RCC->APB1ENR &= ~(RCC_APB1ENR_RTCAPBEN))
51005097#define __HAL_RCC_SPI3_CLK_DISABLE () (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI3EN))
5101- #if defined(STM32F412Zx ) || defined(STM32F412Vx ) || defined(STM32F412Rx ) || defined(STM32F413xx ) || defined(STM32F423xx )
51025098#define __HAL_RCC_USART3_CLK_DISABLE () (RCC->APB1ENR &= ~(RCC_APB1ENR_USART3EN))
5103- #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
51045099#if defined(STM32F413xx ) || defined(STM32F423xx )
51055100#define __HAL_RCC_UART4_CLK_DISABLE () (RCC->APB1ENR &= ~(RCC_APB1ENR_UART4EN))
51065101#define __HAL_RCC_UART5_CLK_DISABLE () (RCC->APB1ENR &= ~(RCC_APB1ENR_UART5EN))
@@ -5140,9 +5135,7 @@ typedef struct
51405135#endif /* STM32F413xx || STM32F423xx */
51415136#define __HAL_RCC_RTCAPB_IS_CLK_ENABLED () ((RCC->APB1ENR & (RCC_APB1ENR_RTCAPBEN)) != RESET)
51425137#define __HAL_RCC_SPI3_IS_CLK_ENABLED () ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) != RESET)
5143- #if defined(STM32F412Zx ) || defined(STM32F412Vx ) || defined(STM32F412Rx ) || defined(STM32F413xx ) || defined(STM32F423xx )
51445138#define __HAL_RCC_USART3_IS_CLK_ENABLED () ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) != RESET)
5145- #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx | STM32F423xx */
51465139#if defined(STM32F413xx ) || defined(STM32F423xx )
51475140#define __HAL_RCC_UART4_IS_CLK_ENABLED () ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) != RESET)
51485141#define __HAL_RCC_UART5_IS_CLK_ENABLED () ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) != RESET)
@@ -5171,9 +5164,7 @@ typedef struct
51715164#endif /* STM32F413xx || STM32F423xx */
51725165#define __HAL_RCC_RTCAPB_IS_CLK_DISABLED () ((RCC->APB1ENR & (RCC_APB1ENR_RTCAPBEN)) == RESET)
51735166#define __HAL_RCC_SPI3_IS_CLK_DISABLED () ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) == RESET)
5174- #if defined(STM32F412Zx ) || defined(STM32F412Vx ) || defined(STM32F412Rx ) || defined(STM32F413xx ) || defined(STM32F423xx )
51755167#define __HAL_RCC_USART3_IS_CLK_DISABLED () ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) == RESET)
5176- #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx | STM32F423xx */
51775168#if defined(STM32F413xx ) || defined(STM32F423xx )
51785169#define __HAL_RCC_UART4_IS_CLK_DISABLED () ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) == RESET)
51795170#define __HAL_RCC_UART5_IS_CLK_DISABLED () ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) == RESET)
@@ -5445,9 +5436,7 @@ typedef struct
54455436#define __HAL_RCC_LPTIM1_FORCE_RESET () (RCC->APB1RSTR |= (RCC_APB1RSTR_LPTIM1RST))
54465437#endif /* STM32F413xx || STM32F423xx */
54475438#define __HAL_RCC_SPI3_FORCE_RESET () (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST))
5448- #if defined(STM32F412Zx ) || defined(STM32F412Vx ) || defined(STM32F412Rx ) || defined(STM32F413xx ) || defined(STM32F423xx )
54495439#define __HAL_RCC_USART3_FORCE_RESET () (RCC->APB1RSTR |= (RCC_APB1RSTR_USART3RST))
5450- #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
54515440#if defined(STM32F413xx ) || defined(STM32F423xx )
54525441#define __HAL_RCC_UART4_FORCE_RESET () (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST))
54535442#define __HAL_RCC_UART5_FORCE_RESET () (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST))
@@ -5475,9 +5464,7 @@ typedef struct
54755464#define __HAL_RCC_LPTIM1_RELEASE_RESET () (RCC->APB1RSTR &= ~(RCC_APB1RSTR_LPTIM1RST))
54765465#endif /* STM32F413xx || STM32F423xx */
54775466#define __HAL_RCC_SPI3_RELEASE_RESET () (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST))
5478- #if defined(STM32F412Zx ) || defined(STM32F412Vx ) || defined(STM32F412Rx ) || defined(STM32F413xx ) || defined(STM32F423xx )
54795467#define __HAL_RCC_USART3_RELEASE_RESET () (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USART3RST))
5480- #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
54815468#if defined(STM32F413xx ) || defined(STM32F423xx )
54825469#define __HAL_RCC_UART4_RELEASE_RESET () (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST))
54835470#define __HAL_RCC_UART5_RELEASE_RESET () (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
@@ -5633,9 +5620,7 @@ typedef struct
56335620#endif /* STM32F413xx || STM32F423xx */
56345621#define __HAL_RCC_RTCAPB_CLK_SLEEP_ENABLE () (RCC->APB1LPENR |= (RCC_APB1LPENR_RTCAPBLPEN))
56355622#define __HAL_RCC_SPI3_CLK_SLEEP_ENABLE () (RCC->APB1LPENR |= (RCC_APB1LPENR_SPI3LPEN))
5636- #if defined(STM32F412Zx ) || defined(STM32F412Vx ) || defined(STM32F412Rx ) || defined(STM32F413xx ) || defined(STM32F423xx )
56375623#define __HAL_RCC_USART3_CLK_SLEEP_ENABLE () (RCC->APB1LPENR |= (RCC_APB1LPENR_USART3LPEN))
5638- #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
56395624#if defined(STM32F413xx ) || defined(STM32F423xx )
56405625#define __HAL_RCC_UART4_CLK_SLEEP_ENABLE () (RCC->APB1LPENR |= (RCC_APB1LPENR_UART4LPEN))
56415626#define __HAL_RCC_UART5_CLK_SLEEP_ENABLE () (RCC->APB1LPENR |= (RCC_APB1LPENR_UART5LPEN))
@@ -5664,9 +5649,7 @@ typedef struct
56645649#endif /* STM32F413xx || STM32F423xx */
56655650#define __HAL_RCC_RTCAPB_CLK_SLEEP_DISABLE () (RCC->APB1LPENR &= ~(RCC_APB1LPENR_RTCAPBLPEN))
56665651#define __HAL_RCC_SPI3_CLK_SLEEP_DISABLE () (RCC->APB1LPENR &= ~(RCC_APB1LPENR_SPI3LPEN))
5667- #if defined(STM32F412Zx ) || defined(STM32F412Vx ) || defined(STM32F412Rx ) || defined(STM32F413xx ) || defined(STM32F423xx )
56685652#define __HAL_RCC_USART3_CLK_SLEEP_DISABLE () (RCC->APB1LPENR &= ~(RCC_APB1LPENR_USART3LPEN))
5669- #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
56705653#if defined(STM32F413xx ) || defined(STM32F423xx )
56715654#define __HAL_RCC_UART4_CLK_SLEEP_DISABLE () (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART4LPEN))
56725655#define __HAL_RCC_UART5_CLK_SLEEP_DISABLE () (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART5LPEN))
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