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fix(h5): review SPI input clock
Also prevent to use HSE as it is not operational as oscillator. See Errata sheet. Fixes #2598 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent ffb23d6 commit f84a621

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9 files changed

+150
-81
lines changed

9 files changed

+150
-81
lines changed

‎variants/STM32H5xx/H503CB(T-U)/generic_clock.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ WEAK void SystemClock_Config(void)
4747
RCC_OscInitStruct.PLL.PLLM = 1;
4848
RCC_OscInitStruct.PLL.PLLN = 125;
4949
RCC_OscInitStruct.PLL.PLLP = 2;
50-
RCC_OscInitStruct.PLL.PLLQ = 2;
50+
RCC_OscInitStruct.PLL.PLLQ = 10;
5151
RCC_OscInitStruct.PLL.PLLR = 2;
5252
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
5353
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;

‎variants/STM32H5xx/H503RBT/generic_clock.c‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ WEAK void SystemClock_Config(void)
4343
RCC_OscInitStruct.PLL.PLLM = 1;
4444
RCC_OscInitStruct.PLL.PLLN = 125;
4545
RCC_OscInitStruct.PLL.PLLP = 2;
46-
RCC_OscInitStruct.PLL.PLLQ = 2;
46+
RCC_OscInitStruct.PLL.PLLQ = 10;
4747
RCC_OscInitStruct.PLL.PLLR = 2;
4848
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
4949
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
@@ -64,6 +64,10 @@ WEAK void SystemClock_Config(void)
6464
Error_Handler();
6565
}
6666

67+
/** Configure the programming delay
68+
*/
69+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
70+
6771
/* Initializes the peripherals clock */
6872
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
6973
| RCC_PERIPHCLK_USB;
@@ -72,7 +76,7 @@ WEAK void SystemClock_Config(void)
7276
PeriphClkInitStruct.PLL2.PLL2N = 125;
7377
PeriphClkInitStruct.PLL2.PLL2P = 2;
7478
PeriphClkInitStruct.PLL2.PLL2Q = 15;
75-
PeriphClkInitStruct.PLL2.PLL2R = 4;
79+
PeriphClkInitStruct.PLL2.PLL2R = 10;
7680
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
7781
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
7882
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;

‎variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.cpp‎

Lines changed: 30 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -114,20 +114,25 @@ WEAK void SystemClock_Config(void)
114114

115115
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
116116

117+
/** Configure LSE Drive Capability
118+
* Warning : Only applied when the LSE is disabled.
119+
*/
120+
HAL_PWR_EnableBkUpAccess();
121+
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
122+
117123
/* Initializes the RCC Oscillators according to the specified parameters in the RCC_OscInitTypeDef structure */
118-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE
119-
| RCC_OSCILLATORTYPE_LSE;
120-
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
124+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_CSI;
121125
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
122-
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
126+
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
127+
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
123128
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
124-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE;
125-
RCC_OscInitStruct.PLL.PLLM = 12;
126-
RCC_OscInitStruct.PLL.PLLN = 250;
129+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
130+
RCC_OscInitStruct.PLL.PLLM = 1;
131+
RCC_OscInitStruct.PLL.PLLN = 125;
127132
RCC_OscInitStruct.PLL.PLLP = 2;
128-
RCC_OscInitStruct.PLL.PLLQ = 2;
133+
RCC_OscInitStruct.PLL.PLLQ = 10;
129134
RCC_OscInitStruct.PLL.PLLR = 2;
130-
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1;
135+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
131136
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
132137
RCC_OscInitStruct.PLL.PLLFRACN = 0;
133138
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
@@ -148,23 +153,27 @@ WEAK void SystemClock_Config(void)
148153
Error_Handler();
149154
}
150155

156+
/** Configure the programming delay
157+
*/
158+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
159+
151160
/* Initializes the peripherals clock */
152-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
153-
| RCC_PERIPHCLK_USB;
154-
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_HSE;
155-
PeriphClkInitStruct.PLL2.PLL2M = 2;
156-
PeriphClkInitStruct.PLL2.PLL2N = 31;
157-
PeriphClkInitStruct.PLL2.PLL2P = 2;
158-
PeriphClkInitStruct.PLL2.PLL2Q = 12;
161+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_ADCDAC
162+
| RCC_PERIPHCLK_LPUART1;
163+
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
164+
PeriphClkInitStruct.PLL2.PLL2M = 1;
165+
PeriphClkInitStruct.PLL2.PLL2N = 36;
166+
PeriphClkInitStruct.PLL2.PLL2P = 3;
167+
PeriphClkInitStruct.PLL2.PLL2Q = 4;
159168
PeriphClkInitStruct.PLL2.PLL2R = 3;
160-
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_3;
169+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
161170
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
162-
PeriphClkInitStruct.PLL2.PLL2FRACN = 2048;
163-
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
171+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
172+
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVP | RCC_PLL2_DIVQ
173+
| RCC_PLL2_DIVR;
164174
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
165175
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
166-
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
167-
176+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL2Q;
168177
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
169178
Error_Handler();
170179
}

‎variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.cpp‎

Lines changed: 23 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -112,19 +112,24 @@ WEAK void SystemClock_Config(void)
112112
/** Initializes the RCC Oscillators according to the specified parameters
113113
* in the RCC_OscInitTypeDef structure.
114114
*/
115-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSE ;
116-
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
115+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSI
116+
| RCC_OSCILLATORTYPE_CSI;
117+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
118+
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV2;
119+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
117120
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
121+
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
122+
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
118123
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
119-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE;
124+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
120125
RCC_OscInitStruct.PLL.PLLM = 1;
121-
RCC_OscInitStruct.PLL.PLLN = 62;
126+
RCC_OscInitStruct.PLL.PLLN = 125;
122127
RCC_OscInitStruct.PLL.PLLP = 2;
123-
RCC_OscInitStruct.PLL.PLLQ = 2;
128+
RCC_OscInitStruct.PLL.PLLQ = 10;
124129
RCC_OscInitStruct.PLL.PLLR = 2;
125-
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_3;
130+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
126131
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
127-
RCC_OscInitStruct.PLL.PLLFRACN = 4096;
132+
RCC_OscInitStruct.PLL.PLLFRACN = 0;
128133
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
129134
Error_Handler();
130135
}
@@ -150,25 +155,26 @@ WEAK void SystemClock_Config(void)
150155
/** Initializes the peripherals clock
151156
*/
152157
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_ADCDAC
153-
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB;
154-
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_HSE;
158+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB
159+
| RCC_PERIPHCLK_SDMMC1;
160+
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
155161
PeriphClkInitStruct.PLL2.PLL2M = 1;
156-
PeriphClkInitStruct.PLL2.PLL2N = 32;
162+
PeriphClkInitStruct.PLL2.PLL2N = 48;
157163
PeriphClkInitStruct.PLL2.PLL2P = 2;
158-
PeriphClkInitStruct.PLL2.PLL2Q = 8;
164+
PeriphClkInitStruct.PLL2.PLL2Q = 1;
159165
PeriphClkInitStruct.PLL2.PLL2R = 4;
160166
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
161167
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
162-
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
163-
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
164-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
168+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0.0;
169+
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVR;
170+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
165171
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL2R;
166-
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
167-
PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_HSE;
172+
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_HSI;
173+
PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_CSI;
168174
PeriphClkInitStruct.PLL3.PLL3M = 1;
169175
PeriphClkInitStruct.PLL3.PLL3N = 48;
170176
PeriphClkInitStruct.PLL3.PLL3P = 2;
171-
PeriphClkInitStruct.PLL3.PLL3Q = 8;
177+
PeriphClkInitStruct.PLL3.PLL3Q = 4;
172178
PeriphClkInitStruct.PLL3.PLL3R = 2;
173179
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_0;
174180
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_MEDIUM;

‎variants/STM32H5xx/H563IIKxQ_H573IIKxQ/generic_clock.c‎

Lines changed: 24 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ WEAK void SystemClock_Config(void)
4747
RCC_OscInitStruct.PLL.PLLM = 1;
4848
RCC_OscInitStruct.PLL.PLLN = 125;
4949
RCC_OscInitStruct.PLL.PLLP = 2;
50-
RCC_OscInitStruct.PLL.PLLQ = 4;
50+
RCC_OscInitStruct.PLL.PLLQ = 10;
5151
RCC_OscInitStruct.PLL.PLLR = 2;
5252
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
5353
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
@@ -71,16 +71,36 @@ WEAK void SystemClock_Config(void)
7171
Error_Handler();
7272
}
7373

74+
/** Configure the programming delay
75+
*/
76+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
77+
7478
/** Initializes the peripherals clock
7579
*/
7680
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
7781
| RCC_PERIPHCLK_OSPI | RCC_PERIPHCLK_SDMMC1
78-
| RCC_PERIPHCLK_USB;
79-
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_HCLK;
82+
| RCC_PERIPHCLK_SDMMC2 | RCC_PERIPHCLK_USB
83+
| RCC_PERIPHCLK_SPI4 | RCC_PERIPHCLK_SPI5
84+
| RCC_PERIPHCLK_SPI6;
85+
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
86+
PeriphClkInitStruct.PLL2.PLL2M = 1;
87+
PeriphClkInitStruct.PLL2.PLL2N = 36;
88+
PeriphClkInitStruct.PLL2.PLL2P = 2;
89+
PeriphClkInitStruct.PLL2.PLL2Q = 2;
90+
PeriphClkInitStruct.PLL2.PLL2R = 3;
91+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
92+
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
93+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
94+
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
95+
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
8096
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
8197
PeriphClkInitStruct.OspiClockSelection = RCC_OSPICLKSOURCE_HCLK;
82-
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q;
98+
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL2R;
99+
PeriphClkInitStruct.Sdmmc2ClockSelection = RCC_SDMMC2CLKSOURCE_PLL2R;
83100
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
101+
PeriphClkInitStruct.Spi4ClockSelection = RCC_SPI4CLKSOURCE_PLL2Q;
102+
PeriphClkInitStruct.Spi5ClockSelection = RCC_SPI5CLKSOURCE_PLL2Q;
103+
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2Q;
84104

85105
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
86106
Error_Handler();

‎variants/STM32H5xx/H563IIKxQ_H573IIKxQ/variant_STM32H573I_DK.cpp‎

Lines changed: 12 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -208,12 +208,9 @@ WEAK void SystemClock_Config(void)
208208
/** Initializes the RCC Oscillators according to the specified parameters
209209
* in the RCC_OscInitTypeDef structure.
210210
*/
211-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
212-
| RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_CSI;
211+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE
212+
| RCC_OSCILLATORTYPE_CSI;
213213
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DIGITAL;
214-
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
215-
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
216-
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
217214
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
218215
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
219216
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
@@ -222,7 +219,7 @@ WEAK void SystemClock_Config(void)
222219
RCC_OscInitStruct.PLL.PLLM = 5;
223220
RCC_OscInitStruct.PLL.PLLN = 100;
224221
RCC_OscInitStruct.PLL.PLLP = 2;
225-
RCC_OscInitStruct.PLL.PLLQ = 2;
222+
RCC_OscInitStruct.PLL.PLLQ = 10;
226223
RCC_OscInitStruct.PLL.PLLR = 2;
227224
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
228225
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
@@ -245,11 +242,17 @@ WEAK void SystemClock_Config(void)
245242
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
246243
Error_Handler();
247244
}
245+
246+
/** Configure the programming delay
247+
*/
248+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
249+
248250
/** Initializes the peripherals clock
249251
*/
250252
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_SAI1
251253
| RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_SDMMC1
252-
| RCC_PERIPHCLK_USB;
254+
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI4
255+
| RCC_PERIPHCLK_SPI5;
253256
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_CSI;
254257
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
255258
PeriphClkInitStruct.PLL2.PLL2M = 1;
@@ -265,6 +268,8 @@ WEAK void SystemClock_Config(void)
265268
PeriphClkInitStruct.Sai2ClockSelection = RCC_SAI2CLKSOURCE_PLL2P;
266269
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q;
267270
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
271+
PeriphClkInitStruct.Spi4ClockSelection = RCC_SPI4CLKSOURCE_PLL2Q;
272+
PeriphClkInitStruct.Spi5ClockSelection = RCC_SPI5CLKSOURCE_PLL2Q;
268273
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
269274
Error_Handler();
270275
}

‎variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ WEAK void SystemClock_Config(void)
4343
RCC_OscInitStruct.PLL.PLLM = 1;
4444
RCC_OscInitStruct.PLL.PLLN = 125;
4545
RCC_OscInitStruct.PLL.PLLP = 2;
46-
RCC_OscInitStruct.PLL.PLLQ = 2;
46+
RCC_OscInitStruct.PLL.PLLQ = 10;
4747
RCC_OscInitStruct.PLL.PLLR = 2;
4848
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
4949
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
@@ -76,7 +76,7 @@ WEAK void SystemClock_Config(void)
7676
PeriphClkInitStruct.PLL2.PLL2N = 125;
7777
PeriphClkInitStruct.PLL2.PLL2P = 2;
7878
PeriphClkInitStruct.PLL2.PLL2Q = 15;
79-
PeriphClkInitStruct.PLL2.PLL2R = 4;
79+
PeriphClkInitStruct.PLL2.PLL2R = 10;
8080
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
8181
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
8282
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;

‎variants/STM32H5xx/H563Z(G-I)T_H573ZIT/generic_clock.c‎

Lines changed: 26 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -43,9 +43,9 @@ WEAK void SystemClock_Config(void)
4343
RCC_OscInitStruct.PLL.PLLM = 1;
4444
RCC_OscInitStruct.PLL.PLLN = 125;
4545
RCC_OscInitStruct.PLL.PLLP = 2;
46-
RCC_OscInitStruct.PLL.PLLQ = 2;
46+
RCC_OscInitStruct.PLL.PLLQ = 10;
4747
RCC_OscInitStruct.PLL.PLLR = 2;
48-
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_3;
48+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
4949
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
5050
RCC_OscInitStruct.PLL.PLLFRACN = 0;
5151
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
@@ -67,33 +67,45 @@ WEAK void SystemClock_Config(void)
6767
Error_Handler();
6868
}
6969

70+
/** Configure the programming delay
71+
*/
72+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
73+
7074
/** Initializes the peripherals clock
7175
*/
72-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
73-
| RCC_PERIPHCLK_USB;
76+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_SDMMC2
77+
| RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_SPI4
78+
| RCC_PERIPHCLK_SPI5 | RCC_PERIPHCLK_SPI6
79+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB;
7480
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
75-
PeriphClkInitStruct.PLL2.PLL2M = 2;
76-
PeriphClkInitStruct.PLL2.PLL2N = 250;
81+
PeriphClkInitStruct.PLL2.PLL2M = 1;
82+
PeriphClkInitStruct.PLL2.PLL2N = 36;
7783
PeriphClkInitStruct.PLL2.PLL2P = 2;
78-
PeriphClkInitStruct.PLL2.PLL2Q = 15;
79-
PeriphClkInitStruct.PLL2.PLL2R = 4;
80-
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1;
84+
PeriphClkInitStruct.PLL2.PLL2Q = 4;
85+
PeriphClkInitStruct.PLL2.PLL2R = 3;
86+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
8187
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
8288
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
8389
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
8490
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
91+
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL2R;
92+
PeriphClkInitStruct.Sdmmc2ClockSelection = RCC_SDMMC2CLKSOURCE_PLL2R;
8593
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
94+
PeriphClkInitStruct.Spi4ClockSelection = RCC_SPI4CLKSOURCE_PLL2Q;
95+
PeriphClkInitStruct.Spi5ClockSelection = RCC_SPI5CLKSOURCE_PLL2Q;
96+
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2Q;
8697
PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_CSI;
87-
PeriphClkInitStruct.PLL3.PLL3M = 2;
88-
PeriphClkInitStruct.PLL3.PLL3N = 240;
98+
PeriphClkInitStruct.PLL3.PLL3M = 1;
99+
PeriphClkInitStruct.PLL3.PLL3N = 48;
89100
PeriphClkInitStruct.PLL3.PLL3P = 2;
90-
PeriphClkInitStruct.PLL3.PLL3Q = 10;
101+
PeriphClkInitStruct.PLL3.PLL3Q = 4;
91102
PeriphClkInitStruct.PLL3.PLL3R = 2;
92-
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_3;
93-
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE;
103+
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_0;
104+
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_MEDIUM;
94105
PeriphClkInitStruct.PLL3.PLL3FRACN = 0.0;
95106
PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ;
96107
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3Q;
108+
97109
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
98110
Error_Handler();
99111
}

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