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[H7] Update STM32H7xx HAL Drivers to v1.7.0
Included in STM32CubeH7 FW V1.6.0 Note: Trailing spaces have been cleaned. Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
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‎system/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h‎

Lines changed: 151 additions & 20 deletions
Large diffs are not rendered by default.

‎system/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h‎

Lines changed: 104 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -96,6 +96,28 @@ typedef enum
9696

9797
#define IS_SYSCFG_VREFBUF_TRIMMING(__VALUE__) (((__VALUE__) > 0UL) && ((__VALUE__) <= VREFBUF_CCR_TRIM))
9898

99+
/**
100+
* @}
101+
*/
102+
103+
#if !defined(SYSCFG_PMCR_BOOSTEN)
104+
/** @defgroup SYSCFG_FastModePlus_GPIO Fast-mode Plus on GPIO
105+
* @{
106+
*/
107+
108+
/** @brief Fast-mode Plus driving capability on a specific GPIO
109+
*/
110+
#define SYSCFG_FASTMODEPLUS_PB6 SYSCFG_PMCR_I2C_PB6_FMP /*!< Enable Fast-mode Plus on PB6 */
111+
#define SYSCFG_FASTMODEPLUS_PB7 SYSCFG_PMCR_I2C_PB7_FMP /*!< Enable Fast-mode Plus on PB7 */
112+
#define SYSCFG_FASTMODEPLUS_PB8 SYSCFG_PMCR_I2C_PB8_FMP /*!< Enable Fast-mode Plus on PB8 */
113+
#define SYSCFG_FASTMODEPLUS_PB9 SYSCFG_PMCR_I2C_PB9_FMP /*!< Enable Fast-mode Plus on PB9 */
114+
115+
#define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \
116+
(((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \
117+
(((__PIN__) & SYSCFG_FASTMODEPLUS_PB8) == SYSCFG_FASTMODEPLUS_PB8) || \
118+
(((__PIN__) & SYSCFG_FASTMODEPLUS_PB9) == SYSCFG_FASTMODEPLUS_PB9))
119+
120+
#endif /* ! SYSCFG_PMCR_BOOSTEN */
99121
/**
100122
* @}
101123
*/
@@ -241,17 +263,16 @@ typedef enum
241263
#define EXTI_LINE41 ((uint32_t)0x29)
242264
#define EXTI_LINE42 ((uint32_t)0x2A)
243265
#define EXTI_LINE43 ((uint32_t)0x2B)
244-
#define EXTI_LINE44 ((uint32_t)0x2C)
266+
#define EXTI_LINE44 ((uint32_t)0x2C) /* Not available in all family lines */
245267
/* EXTI_LINE45 Reserved */
246268
#if defined(DUAL_CORE)
247269
#define EXTI_LINE46 ((uint32_t)0x2E)
248270
#else
249271
/* EXTI_LINE46 Reserved */
250-
#endif
272+
#endif /* DUAL_CORE */
251273
#define EXTI_LINE47 ((uint32_t)0x2F)
252274
#define EXTI_LINE48 ((uint32_t)0x30)
253275
#define EXTI_LINE49 ((uint32_t)0x31)
254-
255276
#define EXTI_LINE50 ((uint32_t)0x32)
256277
#define EXTI_LINE51 ((uint32_t)0x33)
257278
#define EXTI_LINE52 ((uint32_t)0x34)
@@ -262,7 +283,6 @@ typedef enum
262283
#define EXTI_LINE57 ((uint32_t)0x39)
263284
#define EXTI_LINE58 ((uint32_t)0x3A)
264285
#define EXTI_LINE59 ((uint32_t)0x3B)
265-
266286
#define EXTI_LINE60 ((uint32_t)0x3C)
267287
#define EXTI_LINE61 ((uint32_t)0x3D)
268288
#define EXTI_LINE62 ((uint32_t)0x3E)
@@ -273,45 +293,40 @@ typedef enum
273293
#define EXTI_LINE67 ((uint32_t)0x43)
274294
#define EXTI_LINE68 ((uint32_t)0x44)
275295
#define EXTI_LINE69 ((uint32_t)0x45)
276-
277296
#define EXTI_LINE70 ((uint32_t)0x46)
278297
#define EXTI_LINE71 ((uint32_t)0x47)
279298
#define EXTI_LINE72 ((uint32_t)0x48)
280299
#define EXTI_LINE73 ((uint32_t)0x49)
281300
#define EXTI_LINE74 ((uint32_t)0x4A)
282-
#define EXTI_LINE75 ((uint32_t)0x4B)
283-
#define EXTI_LINE76 ((uint32_t)0x4C)
284-
301+
#define EXTI_LINE75 ((uint32_t)0x4B) /* Not available in all family lines */
302+
#define EXTI_LINE76 ((uint32_t)0x4C) /* Not available in all family lines */
285303
#if defined(DUAL_CORE)
286304
#define EXTI_LINE77 ((uint32_t)0x4D)
287305
#define EXTI_LINE78 ((uint32_t)0x4E)
288306
#define EXTI_LINE79 ((uint32_t)0x4F)
289-
290307
#define EXTI_LINE80 ((uint32_t)0x50)
308+
#else
309+
/* EXTI_LINE77 Reserved */
310+
/* EXTI_LINE78 Reserved */
311+
/* EXTI_LINE79 Reserved */
312+
/* EXTI_LINE80 Reserved */
313+
#endif /* DUAL_CORE */
291314
/* EXTI_LINE81 Reserved */
315+
#if defined(DUAL_CORE)
292316
#define EXTI_LINE82 ((uint32_t)0x52)
317+
#else
318+
/* EXTI_LINE82 Reserved */
319+
#endif /* DUAL_CORE */
293320
/* EXTI_LINE83 Reserved */
321+
#if defined(DUAL_CORE)
294322
#define EXTI_LINE84 ((uint32_t)0x54)
295-
#define EXTI_LINE85 ((uint32_t)0x55)
296-
#define EXTI_LINE86 ((uint32_t)0x56)
297-
#define EXTI_LINE87 ((uint32_t)0x57)
298-
/* EXTI_LINE88 Reserved */
299323
#else
300-
/* EXTI_LINE77 Reserved */
301-
/* EXTI_LINE78 Reserved */
302-
/* EXTI_LINE79 Reserved */
303-
/* EXTI_LINE80 Reserved */
304-
/* EXTI_LINE81 Reserved */
305-
/* EXTI_LINE82 Reserved */
306-
/* EXTI_LINE83 Reserved */
307-
/* EXTI_LINE84 Reserved */
308-
324+
/* EXTI_LINE84 Reserved */
325+
#endif /* DUAL_CORE */
309326
#define EXTI_LINE85 ((uint32_t)0x55)
310-
#define EXTI_LINE86 ((uint32_t)0x56)
327+
#define EXTI_LINE86 ((uint32_t)0x56) /* Not available in all family lines */
311328
#define EXTI_LINE87 ((uint32_t)0x57)
312-
313-
/* EXTI_LINE88 Reserved */
314-
#endif
329+
#define EXTI_LINE88 ((uint32_t)0x58) /* Not available in all family lines */
315330

316331
#if defined(DUAL_CORE)
317332
#define IS_HAL_EXTI_CONFIG_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
@@ -342,7 +357,7 @@ typedef enum
342357
((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
343358
((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE51) || \
344359
((LINE) == EXTI_LINE85) || ((LINE) == EXTI_LINE86))
345-
#endif
360+
#endif /* DUAL_CORE */
346361

347362
#if defined(DUAL_CORE)
348363
#define IS_EXTI_ALL_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
@@ -428,7 +443,8 @@ typedef enum
428443
((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
429444
((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
430445
((LINE) == EXTI_LINE85) || \
431-
((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87))
446+
((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
447+
((LINE) == EXTI_LINE88))
432448
#endif /*DUAL_CORE*/
433449

434450
#if defined(DUAL_CORE)
@@ -513,7 +529,8 @@ typedef enum
513529
((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
514530
((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
515531
((LINE) == EXTI_LINE85) || \
516-
((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87))
532+
((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
533+
((LINE) == EXTI_LINE88))
517534
#endif /*DUAL_CORE*/
518535

519536
#if defined(DUAL_CORE)
@@ -576,7 +593,7 @@ typedef enum
576593
((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
577594
((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
578595
((LINE) == EXTI_LINE53))
579-
#else
596+
#elif (POWER_DOMAINS_NUMBER == 3U)
580597
#define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
581598
((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
582599
((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
@@ -592,17 +609,43 @@ typedef enum
592609
((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
593610
((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
594611
((LINE) == EXTI_LINE53))
595-
#endif
612+
#else
613+
#define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
614+
((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
615+
((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
616+
((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
617+
((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
618+
((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
619+
((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
620+
((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
621+
((LINE) == EXTI_LINE19) || ((LINE) == EXTI_LINE20) || \
622+
((LINE) == EXTI_LINE21) || ((LINE) == EXTI_LINE25) || \
623+
((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
624+
((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \
625+
((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
626+
((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE88))
627+
#endif /*DUAL_CORE*/
596628

597629

598630
#define BDMA_CH6_CLEAR ((uint32_t)0x00000000) /*!< BDMA ch6 event selected as D3 domain pendclear source*/
599631
#define BDMA_CH7_CLEAR ((uint32_t)0x00000001) /*!< BDMA ch7 event selected as D3 domain pendclear source*/
632+
#if defined (LPTIM4)
600633
#define LPTIM4_OUT_CLEAR ((uint32_t)0x00000002) /*!< LPTIM4 out selected as D3 domain pendclear source*/
634+
#else
635+
#define LPTIM2_OUT_CLEAR ((uint32_t)0x00000002) /*!< LPTIM2 out selected as D3 domain pendclear source*/
636+
#endif /* LPTIM4 */
637+
#if defined (LPTIM5)
601638
#define LPTIM5_OUT_CLEAR ((uint32_t)0x00000003) /*!< LPTIM5 out selected as D3 domain pendclear source*/
602-
639+
#else
640+
#define LPTIM3_OUT_CLEAR ((uint32_t)0x00000003) /*!< LPTIM3 out selected as D3 domain pendclear source*/
641+
#endif /* LPTIM5 */
642+
#if defined (LPTIM4) && defined (LPTIM5)
603643
#define IS_EXTI_D3_CLEAR(SOURCE) (((SOURCE) == BDMA_CH6_CLEAR) || ((SOURCE) == BDMA_CH7_CLEAR) || \
604644
((SOURCE) == LPTIM4_OUT_CLEAR) || ((SOURCE) == LPTIM5_OUT_CLEAR))
605-
645+
#else
646+
#define IS_EXTI_D3_CLEAR(SOURCE) (((SOURCE) == BDMA_CH6_CLEAR) || ((SOURCE) == BDMA_CH7_CLEAR) || \
647+
((SOURCE) == LPTIM2_OUT_CLEAR) || ((SOURCE) == LPTIM3_OUT_CLEAR))
648+
#endif /* LPTIM4 LPTIM5 */
606649
/**
607650
* @}
608651
*/
@@ -739,6 +782,23 @@ typedef enum
739782
#define __HAL_SYSCFG_BREAK_CM4_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM4L)
740783
#endif /* DUAL_CORE */
741784

785+
#if !defined(SYSCFG_PMCR_BOOSTEN)
786+
/** @brief Fast-mode Plus driving capability enable/disable macros
787+
* @param __FASTMODEPLUS__ This parameter can be a value of :
788+
* @arg @ref SYSCFG_FASTMODEPLUS_PB6 Fast-mode Plus driving capability activation on PB6
789+
* @arg @ref SYSCFG_FASTMODEPLUS_PB7 Fast-mode Plus driving capability activation on PB7
790+
* @arg @ref SYSCFG_FASTMODEPLUS_PB8 Fast-mode Plus driving capability activation on PB8
791+
* @arg @ref SYSCFG_FASTMODEPLUS_PB9 Fast-mode Plus driving capability activation on PB9
792+
*/
793+
#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
794+
SET_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
795+
}while(0)
796+
797+
#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
798+
CLEAR_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
799+
}while(0)
800+
801+
#endif /* !SYSCFG_PMCR_BOOSTEN */
742802
/**
743803
* @}
744804
*/
@@ -935,11 +995,19 @@ uint32_t HAL_GetDEVID(void);
935995
uint32_t HAL_GetUIDw0(void);
936996
uint32_t HAL_GetUIDw1(void);
937997
uint32_t HAL_GetUIDw2(void);
998+
#if defined(SYSCFG_PMCR_EPIS_SEL)
938999
void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface);
1000+
#endif /* SYSCFG_PMCR_EPIS_SEL */
9391001
void HAL_SYSCFG_AnalogSwitchConfig(uint32_t SYSCFG_AnalogSwitch , uint32_t SYSCFG_SwitchState );
1002+
#if defined(SYSCFG_PMCR_BOOSTEN)
9401003
void HAL_SYSCFG_EnableBOOST(void);
9411004
void HAL_SYSCFG_DisableBOOST(void);
1005+
#endif /* SYSCFG_PMCR_BOOSTEN */
1006+
1007+
#if defined (SYSCFG_UR2_BOOT_ADD0) || defined (SYSCFG_UR2_BCM7_ADD0)
9421008
void HAL_SYSCFG_CM7BootAddConfig(uint32_t BootRegister, uint32_t BootAddress);
1009+
#endif /* SYSCFG_UR2_BOOT_ADD0 || SYSCFG_UR2_BCM7_ADD0*/
1010+
9431011
#if defined(DUAL_CORE)
9441012
void HAL_SYSCFG_CM4BootAddConfig(uint32_t BootRegister, uint32_t BootAddress);
9451013
void HAL_SYSCFG_EnableCM7BOOT(void);
@@ -953,6 +1021,9 @@ void HAL_SYSCFG_EnableIOSpeedOptimize(void);
9531021
void HAL_SYSCFG_DisableIOSpeedOptimize(void);
9541022
void HAL_SYSCFG_CompensationCodeSelect(uint32_t SYSCFG_CompCode);
9551023
void HAL_SYSCFG_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode);
1024+
#if defined(SYSCFG_CCCR_NCC_MMC)
1025+
void HAL_SYSCFG_VDDMMC_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode);
1026+
#endif /* SYSCFG_CCCR_NCC_MMC */
9561027
void HAL_EnableDBGSleepMode(void);
9571028
void HAL_DisableDBGSleepMode(void);
9581029
void HAL_EnableDBGStopMode(void);

‎system/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_adc.h‎

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -618,17 +618,20 @@ typedef void (*pADC_CallbackTypeDef)(ADC_HandleTypeDef *hadc); /*!< pointer to
618618
#define ADC_CHANNEL_VBAT (LL_ADC_CHANNEL_VBAT) /*!< ADC internal channel connected to Vbat/4: Vbat voltage through a divider ladder of factor 1/4 to have Vbat always below Vdda, channel specific to ADC3. */
619619
#define ADC_CHANNEL_DAC1CH1_ADC2 (LL_ADC_CHANNEL_DAC1CH1_ADC2) /*!< ADC internal channel connected to DAC1 channel 1, channel specific to ADC2 */
620620
#define ADC_CHANNEL_DAC1CH2_ADC2 (LL_ADC_CHANNEL_DAC1CH2_ADC2) /*!< ADC internal channel connected to DAC1 channel 2, channel specific to ADC2 */
621+
#if defined (LL_ADC_CHANNEL_DAC2CH1_ADC2)
622+
#define ADC_CHANNEL_DAC2CH1_ADC2 (LL_ADC_CHANNEL_DAC2CH1_ADC2) /*!< ADC internal channel connected to DAC2 channel 1, channel specific to ADC2 */
623+
#endif
621624
/**
622625
* @}
623626
*/
624627

625628
/** @defgroup ADC_ConversionDataManagement ADC Conversion Data Management
626629
* @{
627630
*/
628-
#define ADC_CONVERSIONDATA_DR ((uint32_t)0x00000000) /*!< Regular Conversion data stored in DR register only */
629-
#define ADC_CONVERSIONDATA_DFSDM ((uint32_t)ADC_CFGR_DMNGT_1) /*!< DFSDM mode selected */
630-
#define ADC_CONVERSIONDATA_DMA_ONESHOT ((uint32_t)ADC_CFGR_DMNGT_0) /*!< DMA one shot mode selected */
631-
#define ADC_CONVERSIONDATA_DMA_CIRCULAR ((uint32_t)(ADC_CFGR_DMNGT_0 | ADC_CFGR_DMNGT_1)) /*!< DMA circular mode selected */
631+
#define ADC_CONVERSIONDATA_DR (0x00000000UL) /*!< Regular Conversion data stored in DR register only */
632+
#define ADC_CONVERSIONDATA_DFSDM (ADC_CFGR_DMNGT_1) /*!< DFSDM mode selected */
633+
#define ADC_CONVERSIONDATA_DMA_ONESHOT (ADC_CFGR_DMNGT_0) /*!< DMA one shot mode selected */
634+
#define ADC_CONVERSIONDATA_DMA_CIRCULAR (ADC_CFGR_DMNGT_0 | ADC_CFGR_DMNGT_1) /*!< DMA circular mode selected */
632635
/**
633636
* @}
634637
*/
@@ -832,10 +835,15 @@ typedef void (*pADC_CallbackTypeDef)(ADC_HandleTypeDef *hadc); /*!< pointer to
832835
* @param __HANDLE__: ADC handle
833836
* @retval SET (clock mode is synchronous) or RESET (clock mode is asynchronous)
834837
*/
838+
#if defined (ADC3)
835839
#define ADC_IS_SYNCHRONOUS_CLOCK_MODE(__HANDLE__) \
836840
(((((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2))? \
837841
((ADC12_COMMON->CCR & ADC_CCR_CKMODE) != 0UL) \
838842
:((((ADC3_COMMON)->CCR) & ADC_CCR_CKMODE) != 0UL))
843+
#else
844+
#define ADC_IS_SYNCHRONOUS_CLOCK_MODE(__HANDLE__) ((ADC12_COMMON->CCR & ADC_CCR_CKMODE) != 0UL)
845+
846+
#endif
839847

840848
/**
841849
* @brief Simultaneously clear and set specific bits of the handle State.

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