9797 *
9898 ******************************************************************************
9999 */
100-
100+ #if defined( TIM1_BASE ) && defined( UART_EMUL_RX ) && defined( UART_EMUL_TX )
101101/* Includes ------------------------------------------------------------------*/
102102#include "hal_uart_emul.h"
103103
@@ -687,7 +687,7 @@ static void UART_Emul_ReceiveFrame(UART_Emul_HandleTypeDef *huart, uint32_t *pDa
687687 uint32_t tmp_size = 0 ;
688688 uint32_t tmp_arr = 0 ;
689689
690- tmp_arr = UART_EMUL_RX_TIMER_INSTANCE -> ARR ;
690+ tmp_arr = UART_EMUL_RX_TIMER_INSTANCE -> ARR ;
691691 tmp_ds = (uint32_t )pData ;
692692 tmp_sr = (uint32_t ) & (huart -> RxPortName -> IDR );
693693 tmp_size = __HAL_UART_EMUL_FRAME_LENGTH (huart );
@@ -698,6 +698,16 @@ static void UART_Emul_ReceiveFrame(UART_Emul_HandleTypeDef *huart, uint32_t *pDa
698698 /* Enable the transfer Error interrupt */
699699 __HAL_DMA_ENABLE_IT (& hdma_rx , DMA_IT_TE );
700700
701+ #if defined (STM32F0xx ) || defined (STM32F3xx )
702+ /* Configure DMA Stream data length */
703+ hdma_rx .Instance -> CNDTR = tmp_size ;
704+
705+ /* Configure DMA Stream source address */
706+ hdma_rx .Instance -> CPAR = tmp_sr ;
707+
708+ /* Configure DMA Stream destination address */
709+ hdma_rx .Instance -> CMAR = tmp_ds ;
710+ #else
701711 /* Configure DMA Stream data length */
702712 hdma_rx .Instance -> NDTR = tmp_size ;
703713
@@ -706,7 +716,7 @@ static void UART_Emul_ReceiveFrame(UART_Emul_HandleTypeDef *huart, uint32_t *pDa
706716
707717 /* Configure DMA Stream destination address */
708718 hdma_rx .Instance -> M0AR = tmp_ds ;
709-
719+ #endif
710720 /* Enable the Peripheral */
711721 __HAL_DMA_ENABLE (& hdma_rx );
712722
@@ -795,18 +805,20 @@ static void UART_Emul_SetConfig_DMATx(void)
795805
796806 /*##-1- Configure DMA For UART Emulation TX #############################*/
797807 /* Set the parameters to be configured */
798- hdma_tx .Init .Channel = DMA_Channel_Tx ; /* Channel used */
799808 hdma_tx .Init .Direction = DMA_MEMORY_TO_PERIPH ; /* Transfer mode */
800809 hdma_tx .Init .PeriphInc = DMA_PINC_DISABLE ; /* Peripheral increment mode Disable */
801810 hdma_tx .Init .MemInc = DMA_MINC_ENABLE ; /* Memory increment mode Enable */
802811 hdma_tx .Init .PeriphDataAlignment = DMA_PDATAALIGN_WORD ; /* Peripheral data alignment : Word */
803812 hdma_tx .Init .MemDataAlignment = DMA_MDATAALIGN_WORD ; /* memory data alignment : Word */
804813 hdma_tx .Init .Mode = DMA_NORMAL ; /* Normal DMA mode */
805814 hdma_tx .Init .Priority = DMA_PRIORITY_HIGH ; /* Priority level : High */
815+ #ifdef STM32F4xx
816+ hdma_tx .Init .Channel = DMA_Channel_Tx ; /* Channel used */
806817 hdma_tx .Init .FIFOMode = DMA_FIFOMODE_DISABLE ; /* FIFO mode disable */
807818 hdma_tx .Init .FIFOThreshold = DMA_FIFO_THRESHOLD_FULL ; /* FIFO threshold level */
808819 hdma_tx .Init .MemBurst = DMA_MBURST_SINGLE ; /* Memory Burst transfer */
809820 hdma_tx .Init .PeriphBurst = DMA_PBURST_SINGLE ; /* Periph Burst transfer */
821+ #endif
810822
811823 /* Set hdma_tim instance */
812824 hdma_tx .Instance = DMA_Stream_Tx ;
@@ -832,19 +844,20 @@ static void UART_Emul_SetConfig_DMARx(void)
832844{
833845 /*##-1- Configure DMA For UART Emulation RX #############################*/
834846 /* Set the parameters to be configured */
835- hdma_rx .Init .Channel = DMA_Channel_Rx ; /* Channel used */
836847 hdma_rx .Init .Direction = DMA_PERIPH_TO_MEMORY ; /* Transfer mode */
837848 hdma_rx .Init .PeriphInc = DMA_PINC_DISABLE ; /* Peripheral increment mode Disable */
838849 hdma_rx .Init .MemInc = DMA_MINC_ENABLE ; /* Memory increment mode Enable */
839850 hdma_rx .Init .PeriphDataAlignment = DMA_PDATAALIGN_WORD ; /* Peripheral data alignment : Word */
840851 hdma_rx .Init .MemDataAlignment = DMA_MDATAALIGN_WORD ; /* memory data alignment : Word */
841852 hdma_rx .Init .Mode = DMA_NORMAL ; /* Normal DMA mode */
842853 hdma_rx .Init .Priority = DMA_PRIORITY_VERY_HIGH ; /* Priority level : very High */
854+ #if defined(STM32F4xx )
855+ hdma_rx .Init .Channel = DMA_Channel_Rx ; /* Channel used */
843856 hdma_rx .Init .FIFOMode = DMA_FIFOMODE_DISABLE ; /* FIFO mode disable */
844857 hdma_rx .Init .FIFOThreshold = DMA_FIFO_THRESHOLD_FULL ; /* FIFO threshold level */
845858 hdma_rx .Init .MemBurst = DMA_MBURST_SINGLE ; /* Memory Burst transfer */
846859 hdma_rx .Init .PeriphBurst = DMA_PBURST_SINGLE ; /* Periph Burst transfer */
847-
860+ #endif
848861 /* Set hdma_tim instance */
849862 hdma_rx .Instance = DMA_Stream_Rx ;
850863
@@ -1071,6 +1084,16 @@ static void UART_Emul_TransmitFrame(UART_Emul_HandleTypeDef *huart)
10711084
10721085 tmp_size = __HAL_UART_EMUL_FRAME_LENGTH (huart );
10731086
1087+ #if defined (STM32F0xx ) || defined (STM32F3xx )
1088+ /* Configure DMA Stream data length */
1089+ hdma_rx .Instance -> CNDTR = tmp_size ;
1090+
1091+ /* Configure DMA Stream source address */
1092+ hdma_rx .Instance -> CPAR = tmp_sr ;
1093+
1094+ /* Configure DMA Stream destination address */
1095+ hdma_rx .Instance -> CMAR = tmp_ds ;
1096+ #else
10741097 /* Configure DMA Stream data length */
10751098 hdma_tx .Instance -> NDTR = tmp_size ;
10761099
@@ -1079,6 +1102,7 @@ static void UART_Emul_TransmitFrame(UART_Emul_HandleTypeDef *huart)
10791102
10801103 /* Configure DMA Stream source address */
10811104 hdma_tx .Instance -> M0AR = tmp_sr ;
1105+ #endif
10821106
10831107 /* Enable the transfer complete interrupt */
10841108 __HAL_DMA_ENABLE_IT (& hdma_tx , DMA_IT_TC );
@@ -1209,5 +1233,5 @@ __weak void HAL_UART_Emul_ErrorCallback(UART_Emul_HandleTypeDef *huart)
12091233/**
12101234 * @}
12111235 */
1212-
1236+ #endif //TIM1_BASE && UART_EMUL_RX && UART_EMUL_TX
12131237/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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