|
28 | 28 | ******************************************************************************* |
29 | 29 | */ |
30 | 30 |
|
31 | | - #ifndef _PINAF_STM32F1_H |
32 | | - #define _PINAF_STM32F1_H |
| 31 | +#ifndef _PINAF_STM32F1_H |
| 32 | +#define _PINAF_STM32F1_H |
33 | 33 |
|
34 | | - #include "Arduino.h" |
| 34 | +#ifdef STM32F1xx |
35 | 35 |
|
36 | | - #ifdef __cplusplus |
37 | | - extern "C" { |
38 | | - #endif |
| 36 | +#include "Arduino.h" |
39 | 37 |
|
40 | | - static inline void pin_SetF1AFPin(uint32_t afnum) |
41 | | - { |
42 | | - // Enable AFIO clock |
43 | | - __HAL_RCC_AFIO_CLK_ENABLE(); |
| 38 | +#ifdef __cplusplus |
| 39 | +extern "C" { |
| 40 | +#endif |
44 | 41 |
|
45 | | - if (afnum > 0) { |
46 | | - switch (afnum) { |
47 | | - case 1: // Remap SPI1 |
48 | | - __HAL_AFIO_REMAP_SPI1_ENABLE(); |
49 | | - break; |
50 | | - case 2: // Remap I2C1 |
51 | | - __HAL_AFIO_REMAP_I2C1_ENABLE(); |
52 | | - break; |
53 | | - case 3: // Remap USART1 |
54 | | - __HAL_AFIO_REMAP_USART1_ENABLE(); |
55 | | - break; |
56 | | - case 4: // Remap USART2 |
57 | | - __HAL_AFIO_REMAP_USART2_ENABLE(); |
58 | | - break; |
59 | | - case 5: // Partial Remap USART3 |
60 | | - __HAL_AFIO_REMAP_USART3_PARTIAL(); |
61 | | - break; |
62 | | - case 6: // Partial Remap TIM1 |
63 | | - __HAL_AFIO_REMAP_TIM1_PARTIAL(); |
64 | | - break; |
65 | | - case 7: // Partial Remap TIM3 |
66 | | - __HAL_AFIO_REMAP_TIM3_PARTIAL(); |
67 | | - break; |
68 | | - case 8: // Full Remap TIM2 |
69 | | - __HAL_AFIO_REMAP_TIM2_ENABLE(); |
70 | | - break; |
71 | | - case 9: // Full Remap TIM3 |
72 | | - __HAL_AFIO_REMAP_TIM3_ENABLE(); |
73 | | - break; |
74 | | - #if defined(AFIO_MAPR_CAN_REMAP_REMAP1) |
75 | | - case 10: // CAN_RX mapped to PB8, CAN_TX mapped to PB9 |
76 | | - __HAL_AFIO_REMAP_CAN1_2(); |
77 | | - break; |
78 | | - case 11: // CAN_RX mapped to PB8, CAN_TX mapped to PB9 |
79 | | - __HAL_AFIO_REMAP_CAN1_3(); |
80 | | - break; |
81 | | - #endif |
82 | | - case 12: // Full Remap USART3 |
83 | | - __HAL_AFIO_REMAP_USART3_ENABLE(); |
84 | | - break; |
85 | | - case 13: // Full Remap TIM1 |
86 | | - __HAL_AFIO_REMAP_TIM1_ENABLE(); |
87 | | - break; |
88 | | - case 14: // Full Remap TIM4 |
89 | | - __HAL_AFIO_REMAP_TIM4_ENABLE(); |
90 | | - break; |
91 | | - default: |
92 | | - break; |
93 | | - } |
94 | | - } |
95 | | - } |
| 42 | +static inline void pinF1_DisconnectDebug(PinName pin) |
| 43 | +{ |
| 44 | + /** Enable this flag gives the possibility to use debug pins without any risk |
| 45 | + * to lose traces |
| 46 | + */ |
| 47 | +#ifndef STM32F1_LOCK_DEBUG |
| 48 | + // Enable AFIO clock |
| 49 | + __HAL_RCC_AFIO_CLK_ENABLE(); |
96 | 50 |
|
97 | | - #ifdef __cplusplus |
98 | | - } |
99 | | - #endif |
| 51 | + // Disconnect JTAG-DP + SW-DP signals. |
| 52 | + // Warning: Need to reconnect under reset |
| 53 | + if ((pin == PA13) || (pin == PA14)) { |
| 54 | + __HAL_AFIO_REMAP_SWJ_DISABLE(); // JTAG-DP Disabled and SW-DP Disabled |
| 55 | + } |
| 56 | + if ((pin == PA15) || (pin == PB3) || (pin == PB4)) { |
| 57 | + __HAL_AFIO_REMAP_SWJ_NOJTAG(); // JTAG-DP Disabled and SW-DP enabled |
| 58 | + } |
| 59 | +#endif /* STM32F1_FORCE_DEBUG */ |
| 60 | +} |
100 | 61 |
|
101 | | - #endif /* _PINAF_STM32F1_H */ |
| 62 | +static inline void pin_SetF1AFPin(uint32_t afnum) |
| 63 | +{ |
| 64 | + // Enable AFIO clock |
| 65 | + __HAL_RCC_AFIO_CLK_ENABLE(); |
| 66 | + |
| 67 | + if (afnum > 0) { |
| 68 | + switch (afnum) { |
| 69 | + case 1: // Remap SPI1 |
| 70 | + __HAL_AFIO_REMAP_SPI1_ENABLE(); |
| 71 | + break; |
| 72 | + case 2: // Remap I2C1 |
| 73 | + __HAL_AFIO_REMAP_I2C1_ENABLE(); |
| 74 | + break; |
| 75 | + case 3: // Remap USART1 |
| 76 | + __HAL_AFIO_REMAP_USART1_ENABLE(); |
| 77 | + break; |
| 78 | + case 4: // Remap USART2 |
| 79 | + __HAL_AFIO_REMAP_USART2_ENABLE(); |
| 80 | + break; |
| 81 | + case 5: // Partial Remap USART3 |
| 82 | + __HAL_AFIO_REMAP_USART3_PARTIAL(); |
| 83 | + break; |
| 84 | + case 6: // Partial Remap TIM1 |
| 85 | + __HAL_AFIO_REMAP_TIM1_PARTIAL(); |
| 86 | + break; |
| 87 | + case 7: // Partial Remap TIM3 |
| 88 | + __HAL_AFIO_REMAP_TIM3_PARTIAL(); |
| 89 | + break; |
| 90 | + case 8: // Full Remap TIM2 |
| 91 | + __HAL_AFIO_REMAP_TIM2_ENABLE(); |
| 92 | + break; |
| 93 | + case 9: // Full Remap TIM3 |
| 94 | + __HAL_AFIO_REMAP_TIM3_ENABLE(); |
| 95 | + break; |
| 96 | +#if defined(AFIO_MAPR_CAN_REMAP_REMAP1) |
| 97 | + case 10: // CAN_RX mapped to PB8, CAN_TX mapped to PB9 |
| 98 | + __HAL_AFIO_REMAP_CAN1_2(); |
| 99 | + break; |
| 100 | + case 11: // CAN_RX mapped to PB8, CAN_TX mapped to PB9 |
| 101 | + __HAL_AFIO_REMAP_CAN1_3(); |
| 102 | + break; |
| 103 | +#endif |
| 104 | + case 12: // Full Remap USART3 |
| 105 | + __HAL_AFIO_REMAP_USART3_ENABLE(); |
| 106 | + break; |
| 107 | + case 13: // Full Remap TIM1 |
| 108 | + __HAL_AFIO_REMAP_TIM1_ENABLE(); |
| 109 | + break; |
| 110 | + case 14: // Full Remap TIM4 |
| 111 | + __HAL_AFIO_REMAP_TIM4_ENABLE(); |
| 112 | + break; |
| 113 | + default: |
| 114 | + break; |
| 115 | + } |
| 116 | + } |
| 117 | +} |
| 118 | + |
| 119 | +#ifdef __cplusplus |
| 120 | +} |
| 121 | +#endif |
| 122 | + |
| 123 | +#endif /* STM32F1xx */ |
| 124 | + |
| 125 | +#endif /* _PINAF_STM32F1_H */ |
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