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Merge pull request #1344 from fpistm/updateL4
Update STM32L4 HAL and CMSIS drivers
2 parents c18cc58 + 9f3f053 commit d8f88bd

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112 files changed

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‎libraries/SrcWrapper/src/HAL/stm32yyxx_hal_smbus_ex.c‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,9 @@
44
#ifdef STM32L0xx
55
#include "stm32l0xx_hal_smbus_ex.c"
66
#endif
7+
#ifdef STM32L4xx
8+
#include "stm32l4xx_hal_smbus_ex.c"
9+
#endif
710
#ifdef STM32L5xx
811
#include "stm32l5xx_hal_smbus_ex.c"
912
#endif

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l412xx.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2259,7 +2259,6 @@ typedef struct
22592259
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
22602260
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
22612261
#define CRS_CR_TRIM_6 (0x40UL << CRS_CR_TRIM_Pos) /*!< 0x00004000 */
2262-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
22632262

22642263
/******************* Bit definition for CRS_CFGR register *********************/
22652264
#define CRS_CFGR_RELOAD_Pos (0U)

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l422xx.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2294,7 +2294,6 @@ typedef struct
22942294
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
22952295
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
22962296
#define CRS_CR_TRIM_6 (0x40UL << CRS_CR_TRIM_Pos) /*!< 0x00004000 */
2297-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
22982297

22992298
/******************* Bit definition for CRS_CFGR register *********************/
23002299
#define CRS_CFGR_RELOAD_Pos (0U)

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l431xx.h‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5729,7 +5729,6 @@ typedef struct
57295729
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
57305730
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
57315731
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5732-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
57335732

57345733
/******************* Bit definition for CRS_CFGR register *********************/
57355734
#define CRS_CFGR_RELOAD_Pos (0U)
@@ -9277,15 +9276,13 @@ typedef struct
92779276

92789277
/*!< HSITRIM configuration */
92799278
#define RCC_ICSCR_HSITRIM_Pos (24U)
9280-
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
9281-
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
9279+
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
9280+
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
92829281
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
92839282
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
92849283
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
92859284
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
92869285
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
9287-
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
9288-
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
92899286

92909287
/******************** Bit definition for RCC_CFGR register ******************/
92919288
/*!< SW configuration */

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l432xx.h‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5714,7 +5714,6 @@ typedef struct
57145714
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
57155715
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
57165716
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5717-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
57185717

57195718
/******************* Bit definition for CRS_CFGR register *********************/
57205719
#define CRS_CFGR_RELOAD_Pos (0U)
@@ -8938,15 +8937,13 @@ typedef struct
89388937

89398938
/*!< HSITRIM configuration */
89408939
#define RCC_ICSCR_HSITRIM_Pos (24U)
8941-
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
8942-
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
8940+
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
8941+
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
89438942
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
89448943
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
89458944
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
89468945
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
89478946
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
8948-
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
8949-
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
89508947

89518948
/******************** Bit definition for RCC_CFGR register ******************/
89528949
/*!< SW configuration */

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l433xx.h‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5788,7 +5788,6 @@ typedef struct
57885788
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
57895789
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
57905790
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5791-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
57925791

57935792
/******************* Bit definition for CRS_CFGR register *********************/
57945793
#define CRS_CFGR_RELOAD_Pos (0U)
@@ -9369,15 +9368,13 @@ typedef struct
93699368

93709369
/*!< HSITRIM configuration */
93719370
#define RCC_ICSCR_HSITRIM_Pos (24U)
9372-
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
9373-
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
9371+
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
9372+
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
93749373
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
93759374
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
93769375
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
93779376
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
93789377
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
9379-
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
9380-
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
93819378

93829379
/******************** Bit definition for RCC_CFGR register ******************/
93839380
/*!< SW configuration */

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l442xx.h‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5749,7 +5749,6 @@ typedef struct
57495749
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
57505750
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
57515751
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5752-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
57535752

57545753
/******************* Bit definition for CRS_CFGR register *********************/
57555754
#define CRS_CFGR_RELOAD_Pos (0U)
@@ -9154,15 +9153,13 @@ typedef struct
91549153

91559154
/*!< HSITRIM configuration */
91569155
#define RCC_ICSCR_HSITRIM_Pos (24U)
9157-
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
9158-
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
9156+
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
9157+
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
91599158
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
91609159
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
91619160
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
91629161
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
91639162
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
9164-
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
9165-
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
91669163

91679164
/******************** Bit definition for RCC_CFGR register ******************/
91689165
/*!< SW configuration */

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l443xx.h‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5823,7 +5823,6 @@ typedef struct
58235823
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
58245824
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
58255825
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5826-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
58275826

58285827
/******************* Bit definition for CRS_CFGR register *********************/
58295828
#define CRS_CFGR_RELOAD_Pos (0U)
@@ -9585,15 +9584,13 @@ typedef struct
95859584

95869585
/*!< HSITRIM configuration */
95879586
#define RCC_ICSCR_HSITRIM_Pos (24U)
9588-
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
9589-
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
9587+
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
9588+
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
95909589
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
95919590
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
95929591
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
95939592
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
95949593
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
9595-
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
9596-
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
95979594

95989595
/******************** Bit definition for RCC_CFGR register ******************/
95999596
/*!< SW configuration */

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l451xx.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5779,7 +5779,6 @@ typedef struct
57795779
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
57805780
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
57815781
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5782-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
57835782

57845783
/******************* Bit definition for CRS_CFGR register *********************/
57855784
#define CRS_CFGR_RELOAD_Pos (0U)

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l452xx.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5821,7 +5821,6 @@ typedef struct
58215821
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
58225822
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
58235823
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5824-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
58255824

58265825
/******************* Bit definition for CRS_CFGR register *********************/
58275826
#define CRS_CFGR_RELOAD_Pos (0U)

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