66 ******************************************************************************
77 * @attention
88 *
9- * <h2><center>© Copyright(c) 2016 STMicroelectronics.
10- * All rights reserved.</center></h2>
9+ * Copyright (c) 2016 STMicroelectronics.
10+ * All rights reserved.
1111 *
12- * This software component is licensed by ST under BSD 3-Clause license,
13- * the "License"; You may not use this file except in compliance with the
14- * License. You may obtain a copy of the License at:
15- * opensource.org/licenses/BSD-3-Clause
12+ * This software is licensed under terms that can be found in the LICENSE file
13+ * in the root directory of this software component.
14+ * If no LICENSE file comes with this software, it is provided AS-IS.
1615 *
1716 ******************************************************************************
1817 */
2221#define __STM32L0xx_HAL_ADC_H
2322
2423#ifdef __cplusplus
25- extern "C" {
24+ extern "C" {
2625#endif
2726
2827/* Includes ------------------------------------------------------------------*/
@@ -54,7 +53,7 @@ typedef struct
5453
5554 uint32_t TriggeredMode ; /*!< Selects the regular triggered oversampling mode.
5655 This parameter can be a value of @ref ADC_Triggered_Oversampling_Mode */
57- }ADC_OversamplingTypeDef ;
56+ } ADC_OversamplingTypeDef ;
5857
5958/**
6059 * @brief Structure definition of ADC instance and ADC group regular.
@@ -124,7 +123,7 @@ typedef struct
124123 Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
125124 Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
126125 This parameter can be set to ENABLE or DISABLE.
127- Note: On this STM32 serie , ADC group regular number of discontinuous ranks increment is fixed to one-by-one. */
126+ Note: On this STM32 series , ADC group regular number of discontinuous ranks increment is fixed to one-by-one. */
128127
129128 uint32_t ExternalTrigConv ; /*!< Select the external event source used to trigger ADC group regular conversion start.
130129 If set to ADC_SOFTWARE_START, external triggers are disabled and software trigger is used instead.
@@ -168,7 +167,7 @@ typedef struct
168167
169168 ADC_OversamplingTypeDef Oversample ; /*!< Specify the Oversampling parameters
170169 Caution: this setting overwrites the previous oversampling configuration if oversampling is already enabled. */
171- }ADC_InitTypeDef ;
170+ } ADC_InitTypeDef ;
172171
173172/**
174173 * @brief Structure definition of ADC channel for regular group
@@ -189,7 +188,7 @@ typedef struct
189188 (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
190189 Despite the channel rank is fixed, this parameter allow an additional possibility: to remove the selected rank (selected channel) from sequencer.
191190 This parameter can be a value of @ref ADC_rank */
192- }ADC_ChannelConfTypeDef ;
191+ } ADC_ChannelConfTypeDef ;
193192
194193/**
195194 * @brief Structure definition of ADC analog watchdog
@@ -216,7 +215,7 @@ typedef struct
216215 uint32_t LowThreshold ; /*!< Configures the ADC analog watchdog High threshold value.
217216 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
218217 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
219- }ADC_AnalogWDGConfTypeDef ;
218+ } ADC_AnalogWDGConfTypeDef ;
220219
221220/**
222221 * @brief HAL ADC state machine: ADC states definition (bitfields)
@@ -242,21 +241,21 @@ typedef struct
242241 external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
243242#define HAL_ADC_STATE_REG_EOC (0x00000200U) /*!< Conversion data available on group regular */
244243#define HAL_ADC_STATE_REG_OVR (0x00000400U) /*!< Overrun occurrence */
245- #define HAL_ADC_STATE_REG_EOSMP (0x00000800U) /*!< Not available on this STM32 serie : End Of Sampling flag raised */
244+ #define HAL_ADC_STATE_REG_EOSMP (0x00000800U) /*!< Not available on this STM32 series : End Of Sampling flag raised */
246245
247246/* States of ADC group injected */
248- #define HAL_ADC_STATE_INJ_BUSY (0x00001000U) /*!< Not available on this STM32 serie : A conversion on group injected is ongoing or can occur (either by auto-injection mode,
247+ #define HAL_ADC_STATE_INJ_BUSY (0x00001000U) /*!< Not available on this STM32 series : A conversion on group injected is ongoing or can occur (either by auto-injection mode,
249248 external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
250- #define HAL_ADC_STATE_INJ_EOC (0x00002000U) /*!< Not available on this STM32 serie : Conversion data available on group injected */
251- #define HAL_ADC_STATE_INJ_JQOVF (0x00004000U) /*!< Not available on this STM32 serie : Injected queue overflow occurrence */
249+ #define HAL_ADC_STATE_INJ_EOC (0x00002000U) /*!< Not available on this STM32 series : Conversion data available on group injected */
250+ #define HAL_ADC_STATE_INJ_JQOVF (0x00004000U) /*!< Not available on this STM32 series : Injected queue overflow occurrence */
252251
253252/* States of ADC analog watchdogs */
254253#define HAL_ADC_STATE_AWD1 (0x00010000U) /*!< Out-of-window occurrence of ADC analog watchdog 1 */
255- #define HAL_ADC_STATE_AWD2 (0x00020000U) /*!< Not available on this STM32 serie : Out-of-window occurrence of ADC analog watchdog 2 */
256- #define HAL_ADC_STATE_AWD3 (0x00040000U) /*!< Not available on this STM32 serie : Out-of-window occurrence of ADC analog watchdog 3 */
254+ #define HAL_ADC_STATE_AWD2 (0x00020000U) /*!< Not available on this STM32 series : Out-of-window occurrence of ADC analog watchdog 2 */
255+ #define HAL_ADC_STATE_AWD3 (0x00040000U) /*!< Not available on this STM32 series : Out-of-window occurrence of ADC analog watchdog 3 */
257256
258257/* States of ADC multi-mode */
259- #define HAL_ADC_STATE_MULTIMODE_SLAVE (0x00100000U) /*!< Not available on this STM32 serie : ADC in multimode slave state, controlled by another ADC master (when feature available) */
258+ #define HAL_ADC_STATE_MULTIMODE_SLAVE (0x00100000U) /*!< Not available on this STM32 series : ADC in multimode slave state, controlled by another ADC master (when feature available) */
260259
261260
262261
@@ -286,7 +285,7 @@ typedef struct __ADC_HandleTypeDef
286285 void (* MspInitCallback )(struct __ADC_HandleTypeDef * hadc ); /*!< ADC Msp Init callback */
287286 void (* MspDeInitCallback )(struct __ADC_HandleTypeDef * hadc ); /*!< ADC Msp DeInit callback */
288287#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
289- }ADC_HandleTypeDef ;
288+ } ADC_HandleTypeDef ;
290289
291290#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1 )
292291/**
@@ -341,18 +340,18 @@ typedef void (*pADC_CallbackTypeDef)(ADC_HandleTypeDef *hadc); /*!< pointer to
341340 * @{
342341 */
343342
344- /* Fixed timeout values for ADC calibration, enable settling time, disable */
345- /* settling time. */
346- /* Values defined to be higher than worst cases: low clocks freq, */
347- /* maximum prescalers. */
348- /* Unit: ms */
343+ /* Fixed timeout values for ADC calibration, enable settling time, disable */
344+ /* settling time. */
345+ /* Values defined to be higher than worst cases: low clocks freq, */
346+ /* maximum prescalers. */
347+ /* Unit: ms */
349348#define ADC_ENABLE_TIMEOUT 10U
350349#define ADC_DISABLE_TIMEOUT 10U
351350#define ADC_STOP_CONVERSION_TIMEOUT 10U
352351
353- /* Delay of 10us fixed to worst case: maximum CPU frequency 180MHz to have */
354- /* the minimum number of CPU cycles to fulfill this delay */
355- #define ADC_DELAY_10US_MIN_CPU_CYCLES 1800U
352+ /* Delay of 10us fixed to worst case: maximum CPU frequency 180MHz to have */
353+ /* the minimum number of CPU cycles to fulfill this delay */
354+ #define ADC_DELAY_10US_MIN_CPU_CYCLES 1800U
356355/**
357356 * @}
358357 */
@@ -1100,10 +1099,10 @@ typedef void (*pADC_CallbackTypeDef)(ADC_HandleTypeDef *hadc); /*!< pointer to
11001099 * @{
11011100 */
11021101/* Initialization and de-initialization functions ****************************/
1103- HAL_StatusTypeDef HAL_ADC_Init (ADC_HandleTypeDef * hadc );
1102+ HAL_StatusTypeDef HAL_ADC_Init (ADC_HandleTypeDef * hadc );
11041103HAL_StatusTypeDef HAL_ADC_DeInit (ADC_HandleTypeDef * hadc );
1105- void HAL_ADC_MspInit (ADC_HandleTypeDef * hadc );
1106- void HAL_ADC_MspDeInit (ADC_HandleTypeDef * hadc );
1104+ void HAL_ADC_MspInit (ADC_HandleTypeDef * hadc );
1105+ void HAL_ADC_MspDeInit (ADC_HandleTypeDef * hadc );
11071106
11081107#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1 )
11091108/* Callbacks Register/UnRegister functions ***********************************/
@@ -1122,27 +1121,27 @@ HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_Ca
11221121/* IO operation functions *****************************************************/
11231122
11241123/* Blocking mode: Polling */
1125- HAL_StatusTypeDef HAL_ADC_Start (ADC_HandleTypeDef * hadc );
1126- HAL_StatusTypeDef HAL_ADC_Stop (ADC_HandleTypeDef * hadc );
1127- HAL_StatusTypeDef HAL_ADC_PollForConversion (ADC_HandleTypeDef * hadc , uint32_t Timeout );
1128- HAL_StatusTypeDef HAL_ADC_PollForEvent (ADC_HandleTypeDef * hadc , uint32_t EventType , uint32_t Timeout );
1124+ HAL_StatusTypeDef HAL_ADC_Start (ADC_HandleTypeDef * hadc );
1125+ HAL_StatusTypeDef HAL_ADC_Stop (ADC_HandleTypeDef * hadc );
1126+ HAL_StatusTypeDef HAL_ADC_PollForConversion (ADC_HandleTypeDef * hadc , uint32_t Timeout );
1127+ HAL_StatusTypeDef HAL_ADC_PollForEvent (ADC_HandleTypeDef * hadc , uint32_t EventType , uint32_t Timeout );
11291128
11301129/* Non-blocking mode: Interruption */
1131- HAL_StatusTypeDef HAL_ADC_Start_IT (ADC_HandleTypeDef * hadc );
1132- HAL_StatusTypeDef HAL_ADC_Stop_IT (ADC_HandleTypeDef * hadc );
1130+ HAL_StatusTypeDef HAL_ADC_Start_IT (ADC_HandleTypeDef * hadc );
1131+ HAL_StatusTypeDef HAL_ADC_Stop_IT (ADC_HandleTypeDef * hadc );
11331132
11341133/* Non-blocking mode: DMA */
1135- HAL_StatusTypeDef HAL_ADC_Start_DMA (ADC_HandleTypeDef * hadc , uint32_t * pData , uint32_t Length );
1136- HAL_StatusTypeDef HAL_ADC_Stop_DMA (ADC_HandleTypeDef * hadc );
1134+ HAL_StatusTypeDef HAL_ADC_Start_DMA (ADC_HandleTypeDef * hadc , uint32_t * pData , uint32_t Length );
1135+ HAL_StatusTypeDef HAL_ADC_Stop_DMA (ADC_HandleTypeDef * hadc );
11371136
11381137/* ADC retrieve conversion value intended to be used with polling or interruption */
1139- uint32_t HAL_ADC_GetValue (ADC_HandleTypeDef * hadc );
1138+ uint32_t HAL_ADC_GetValue (ADC_HandleTypeDef * hadc );
11401139
11411140/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
1142- void HAL_ADC_IRQHandler (ADC_HandleTypeDef * hadc );
1143- void HAL_ADC_ConvCpltCallback (ADC_HandleTypeDef * hadc );
1144- void HAL_ADC_ConvHalfCpltCallback (ADC_HandleTypeDef * hadc );
1145- void HAL_ADC_LevelOutOfWindowCallback (ADC_HandleTypeDef * hadc );
1141+ void HAL_ADC_IRQHandler (ADC_HandleTypeDef * hadc );
1142+ void HAL_ADC_ConvCpltCallback (ADC_HandleTypeDef * hadc );
1143+ void HAL_ADC_ConvHalfCpltCallback (ADC_HandleTypeDef * hadc );
1144+ void HAL_ADC_LevelOutOfWindowCallback (ADC_HandleTypeDef * hadc );
11461145void HAL_ADC_ErrorCallback (ADC_HandleTypeDef * hadc );
11471146/**
11481147 * @}
@@ -1153,8 +1152,8 @@ void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
11531152 * @{
11541153 */
11551154/* Peripheral Control functions ***********************************************/
1156- HAL_StatusTypeDef HAL_ADC_ConfigChannel (ADC_HandleTypeDef * hadc , ADC_ChannelConfTypeDef * sConfig );
1157- HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig (ADC_HandleTypeDef * hadc , ADC_AnalogWDGConfTypeDef * AnalogWDGConfig );
1155+ HAL_StatusTypeDef HAL_ADC_ConfigChannel (ADC_HandleTypeDef * hadc , ADC_ChannelConfTypeDef * sConfig );
1156+ HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig (ADC_HandleTypeDef * hadc , ADC_AnalogWDGConfTypeDef * AnalogWDGConfig );
11581157/**
11591158 * @}
11601159 */
@@ -1163,7 +1162,7 @@ HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_Analog
11631162/** @addtogroup ADC_Exported_Functions_Group4
11641163 * @{
11651164 */
1166- uint32_t HAL_ADC_GetState (ADC_HandleTypeDef * hadc );
1165+ uint32_t HAL_ADC_GetState (ADC_HandleTypeDef * hadc );
11671166uint32_t HAL_ADC_GetError (ADC_HandleTypeDef * hadc );
11681167/**
11691168 * @}
@@ -1189,4 +1188,3 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
11891188
11901189#endif /*__STM32L0xx_HAL_ADC_H */
11911190
1192- /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
0 commit comments