@@ -64,7 +64,7 @@ typedef enum
6464typedef struct __DAC_HandleTypeDef
6565#else
6666typedef struct
67- #endif
67+ #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
6868{
6969 DAC_TypeDef * Instance ; /*!< Register base address */
7070
@@ -79,22 +79,23 @@ typedef struct
7979 __IO uint32_t ErrorCode ; /*!< DAC Error code */
8080
8181#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1 )
82- void (* ConvCpltCallbackCh1 )(struct __DAC_HandleTypeDef * hdac );
83- void (* ConvHalfCpltCallbackCh1 )(struct __DAC_HandleTypeDef * hdac );
84- void (* ErrorCallbackCh1 )(struct __DAC_HandleTypeDef * hdac );
85- void (* DMAUnderrunCallbackCh1 )(struct __DAC_HandleTypeDef * hdac );
86- void (* ConvCpltCallbackCh2 )(struct __DAC_HandleTypeDef * hdac );
87- void (* ConvHalfCpltCallbackCh2 )(struct __DAC_HandleTypeDef * hdac );
88- void (* ErrorCallbackCh2 )(struct __DAC_HandleTypeDef * hdac );
89- void (* DMAUnderrunCallbackCh2 )(struct __DAC_HandleTypeDef * hdac );
90-
91- void (* MspInitCallback )(struct __DAC_HandleTypeDef * hdac );
92- void (* MspDeInitCallback )(struct __DAC_HandleTypeDef * hdac );
82+ void (* ConvCpltCallbackCh1 ) (struct __DAC_HandleTypeDef * hdac );
83+ void (* ConvHalfCpltCallbackCh1 ) (struct __DAC_HandleTypeDef * hdac );
84+ void (* ErrorCallbackCh1 ) (struct __DAC_HandleTypeDef * hdac );
85+ void (* DMAUnderrunCallbackCh1 ) (struct __DAC_HandleTypeDef * hdac );
86+
87+ void (* ConvCpltCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
88+ void (* ConvHalfCpltCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
89+ void (* ErrorCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
90+ void (* DMAUnderrunCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
91+
92+
93+ void (* MspInitCallback ) (struct __DAC_HandleTypeDef * hdac );
94+ void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef * hdac );
9395#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
9496
9597} DAC_HandleTypeDef ;
9698
97-
9899/**
99100 * @brief DAC Configuration regular Channel structure definition
100101 */
@@ -118,10 +119,12 @@ typedef enum
118119 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U , /*!< DAC CH1 half Complete Callback ID */
119120 HAL_DAC_CH1_ERROR_ID = 0x02U , /*!< DAC CH1 error Callback ID */
120121 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U , /*!< DAC CH1 underrun Callback ID */
122+
121123 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U , /*!< DAC CH2 Complete Callback ID */
122124 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U , /*!< DAC CH2 half Complete Callback ID */
123125 HAL_DAC_CH2_ERROR_ID = 0x06U , /*!< DAC CH2 error Callback ID */
124126 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U , /*!< DAC CH2 underrun Callback ID */
127+
125128 HAL_DAC_MSPINIT_CB_ID = 0x08U , /*!< DAC MspInit Callback ID */
126129 HAL_DAC_MSPDEINIT_CB_ID = 0x09U , /*!< DAC MspDeInit Callback ID */
127130 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */
@@ -162,7 +165,7 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
162165/** @defgroup DAC_trigger_selection DAC trigger selection
163166 * @{
164167 */
165- #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */
168+ #define DAC_TRIGGER_NONE 0x00000000UL /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */
166169#define DAC_TRIGGER_T6_TRGO (DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */
167170#define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
168171#define DAC_TRIGGER_T9_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM9 TRGO selected as external conversion trigger for DAC channel */
@@ -189,7 +192,9 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
189192 * @{
190193 */
191194#define DAC_CHANNEL_1 0x00000000U
195+
192196#define DAC_CHANNEL_2 0x00000010U
197+
193198/**
194199 * @}
195200 */
@@ -209,8 +214,10 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
209214 * @{
210215 */
211216#define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1)
217+
212218#define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2)
213219
220+
214221/**
215222 * @}
216223 */
@@ -219,8 +226,10 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
219226 * @{
220227 */
221228#define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1)
229+
222230#define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2)
223231
232+
224233/**
225234 * @}
226235 */
@@ -242,8 +251,8 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
242251#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1 )
243252#define __HAL_DAC_RESET_HANDLE_STATE (__HANDLE__ ) do { \
244253 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \
245- (__HANDLE__)->MspInitCallback = NULL; \
246- (__HANDLE__)->MspDeInitCallback = NULL; \
254+ (__HANDLE__)->MspInitCallback = NULL; \
255+ (__HANDLE__)->MspDeInitCallback = NULL; \
247256 } while(0)
248257#else
249258#define __HAL_DAC_RESET_HANDLE_STATE (__HANDLE__ ) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
@@ -269,26 +278,28 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
269278 * @param __ALIGNMENT__ specifies the DAC alignment
270279 * @retval None
271280 */
272- #define DAC_DHR12R1_ALIGNMENT (__ALIGNMENT__ ) (0x00000008U + (__ALIGNMENT__))
281+ #define DAC_DHR12R1_ALIGNMENT (__ALIGNMENT__ ) (0x00000008UL + (__ALIGNMENT__))
282+
273283
274284/** @brief Set DHR12R2 alignment.
275285 * @param __ALIGNMENT__ specifies the DAC alignment
276286 * @retval None
277287 */
278- #define DAC_DHR12R2_ALIGNMENT (__ALIGNMENT__ ) (0x00000014U + (__ALIGNMENT__))
288+ #define DAC_DHR12R2_ALIGNMENT (__ALIGNMENT__ ) (0x00000014UL + (__ALIGNMENT__))
289+
279290
280291/** @brief Set DHR12RD alignment.
281292 * @param __ALIGNMENT__ specifies the DAC alignment
282293 * @retval None
283294 */
284- #define DAC_DHR12RD_ALIGNMENT (__ALIGNMENT__ ) (0x00000020U + (__ALIGNMENT__))
295+ #define DAC_DHR12RD_ALIGNMENT (__ALIGNMENT__ ) (0x00000020UL + (__ALIGNMENT__))
285296
286297/** @brief Enable the DAC interrupt.
287298 * @param __HANDLE__ specifies the DAC handle
288299 * @param __INTERRUPT__ specifies the DAC interrupt.
289300 * This parameter can be any combination of the following values:
290- * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
291- * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
301+ * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
302+ * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
292303 * @retval None
293304 */
294305#define __HAL_DAC_ENABLE_IT (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
@@ -297,8 +308,8 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
297308 * @param __HANDLE__ specifies the DAC handle
298309 * @param __INTERRUPT__ specifies the DAC interrupt.
299310 * This parameter can be any combination of the following values:
300- * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
301- * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
311+ * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
312+ * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
302313 * @retval None
303314 */
304315#define __HAL_DAC_DISABLE_IT (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
@@ -307,18 +318,19 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
307318 * @param __HANDLE__ DAC handle
308319 * @param __INTERRUPT__ DAC interrupt source to check
309320 * This parameter can be any combination of the following values:
310- * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
311- * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
321+ * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
322+ * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
312323 * @retval State of interruption (SET or RESET)
313324 */
314- #define __HAL_DAC_GET_IT_SOURCE (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
325+ #define __HAL_DAC_GET_IT_SOURCE (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR\
326+ & (__INTERRUPT__)) == (__INTERRUPT__))
315327
316328/** @brief Get the selected DAC's flag status.
317329 * @param __HANDLE__ specifies the DAC handle.
318330 * @param __FLAG__ specifies the DAC flag to get.
319331 * This parameter can be any combination of the following values:
320- * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
321- * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
332+ * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
333+ * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
322334 * @retval None
323335 */
324336#define __HAL_DAC_GET_FLAG (__HANDLE__ , __FLAG__ ) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
@@ -327,8 +339,8 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
327339 * @param __HANDLE__ specifies the DAC handle.
328340 * @param __FLAG__ specifies the DAC flag to clear.
329341 * This parameter can be any combination of the following values:
330- * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
331- * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
342+ * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
343+ * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
332344 * @retval None
333345 */
334346#define __HAL_DAC_CLEAR_FLAG (__HANDLE__ , __FLAG__ ) (((__HANDLE__)->Instance->SR) = (__FLAG__))
@@ -352,7 +364,7 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
352364 ((ALIGN) == DAC_ALIGN_12B_L) || \
353365 ((ALIGN) == DAC_ALIGN_8B_R))
354366
355- #define IS_DAC_DATA (DATA ) ((DATA) <= 0xFFF0U )
367+ #define IS_DAC_DATA (DATA ) ((DATA) <= 0xFFF0UL )
356368
357369/**
358370 * @}
@@ -389,9 +401,7 @@ HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
389401HAL_StatusTypeDef HAL_DAC_Start_DMA (DAC_HandleTypeDef * hdac , uint32_t Channel , uint32_t * pData , uint32_t Length ,
390402 uint32_t Alignment );
391403HAL_StatusTypeDef HAL_DAC_Stop_DMA (DAC_HandleTypeDef * hdac , uint32_t Channel );
392-
393404void HAL_DAC_IRQHandler (DAC_HandleTypeDef * hdac );
394-
395405HAL_StatusTypeDef HAL_DAC_SetValue (DAC_HandleTypeDef * hdac , uint32_t Channel , uint32_t Alignment , uint32_t Data );
396406
397407void HAL_DAC_ConvCpltCallbackCh1 (DAC_HandleTypeDef * hdac );
@@ -415,7 +425,6 @@ HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DA
415425 */
416426/* Peripheral Control functions ***********************************************/
417427uint32_t HAL_DAC_GetValue (DAC_HandleTypeDef * hdac , uint32_t Channel );
418-
419428HAL_StatusTypeDef HAL_DAC_ConfigChannel (DAC_HandleTypeDef * hdac , DAC_ChannelConfTypeDef * sConfig , uint32_t Channel );
420429/**
421430 * @}
@@ -461,7 +470,6 @@ void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
461470#endif
462471
463472
464- #endif /*STM32L1xx_HAL_DAC_H */
473+ #endif /* STM32L1xx_HAL_DAC_H */
465474
466475/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
467-
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