@@ -64,7 +64,7 @@ typedef enum
6464typedef struct __DAC_HandleTypeDef
6565#else
6666typedef struct
67- #endif
67+ #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
6868{
6969 DAC_TypeDef * Instance ; /*!< Register base address */
7070
@@ -83,18 +83,19 @@ typedef struct
8383 void (* ConvHalfCpltCallbackCh1 ) (struct __DAC_HandleTypeDef * hdac );
8484 void (* ErrorCallbackCh1 ) (struct __DAC_HandleTypeDef * hdac );
8585 void (* DMAUnderrunCallbackCh1 ) (struct __DAC_HandleTypeDef * hdac );
86+
8687 void (* ConvCpltCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
8788 void (* ConvHalfCpltCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
8889 void (* ErrorCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
8990 void (* DMAUnderrunCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
9091
92+
9193 void (* MspInitCallback ) (struct __DAC_HandleTypeDef * hdac );
92- void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef * hdac );
94+ void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef * hdac );
9395#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
9496
9597} DAC_HandleTypeDef ;
9698
97-
9899/**
99100 * @brief DAC Configuration regular Channel structure definition
100101 */
@@ -118,10 +119,12 @@ typedef enum
118119 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U , /*!< DAC CH1 half Complete Callback ID */
119120 HAL_DAC_CH1_ERROR_ID = 0x02U , /*!< DAC CH1 error Callback ID */
120121 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U , /*!< DAC CH1 underrun Callback ID */
122+
121123 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U , /*!< DAC CH2 Complete Callback ID */
122124 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U , /*!< DAC CH2 half Complete Callback ID */
123125 HAL_DAC_CH2_ERROR_ID = 0x06U , /*!< DAC CH2 error Callback ID */
124126 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U , /*!< DAC CH2 underrun Callback ID */
127+
125128 HAL_DAC_MSPINIT_CB_ID = 0x08U , /*!< DAC MspInit Callback ID */
126129 HAL_DAC_MSPDEINIT_CB_ID = 0x09U , /*!< DAC MspDeInit Callback ID */
127130 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */
@@ -173,7 +176,9 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
173176 * @{
174177 */
175178#define DAC_CHANNEL_1 0x00000000U
179+
176180#define DAC_CHANNEL_2 0x00000010U
181+
177182/**
178183 * @}
179184 */
@@ -193,8 +198,10 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
193198 * @{
194199 */
195200#define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1)
201+
196202#define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2)
197203
204+
198205/**
199206 * @}
200207 */
@@ -203,8 +210,10 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
203210 * @{
204211 */
205212#define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1)
213+
206214#define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2)
207215
216+
208217/**
209218 * @}
210219 */
@@ -253,26 +262,28 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
253262 * @param __ALIGNMENT__ specifies the DAC alignment
254263 * @retval None
255264 */
256- #define DAC_DHR12R1_ALIGNMENT (__ALIGNMENT__ ) (0x00000008U + (__ALIGNMENT__))
265+ #define DAC_DHR12R1_ALIGNMENT (__ALIGNMENT__ ) (0x00000008UL + (__ALIGNMENT__))
266+
257267
258268/** @brief Set DHR12R2 alignment.
259269 * @param __ALIGNMENT__ specifies the DAC alignment
260270 * @retval None
261271 */
262- #define DAC_DHR12R2_ALIGNMENT (__ALIGNMENT__ ) (0x00000014U + (__ALIGNMENT__))
272+ #define DAC_DHR12R2_ALIGNMENT (__ALIGNMENT__ ) (0x00000014UL + (__ALIGNMENT__))
273+
263274
264275/** @brief Set DHR12RD alignment.
265276 * @param __ALIGNMENT__ specifies the DAC alignment
266277 * @retval None
267278 */
268- #define DAC_DHR12RD_ALIGNMENT (__ALIGNMENT__ ) (0x00000020U + (__ALIGNMENT__))
279+ #define DAC_DHR12RD_ALIGNMENT (__ALIGNMENT__ ) (0x00000020UL + (__ALIGNMENT__))
269280
270281/** @brief Enable the DAC interrupt.
271282 * @param __HANDLE__ specifies the DAC handle
272283 * @param __INTERRUPT__ specifies the DAC interrupt.
273284 * This parameter can be any combination of the following values:
274- * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
275- * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
285+ * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
286+ * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
276287 * @retval None
277288 */
278289#define __HAL_DAC_ENABLE_IT (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
@@ -281,8 +292,8 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
281292 * @param __HANDLE__ specifies the DAC handle
282293 * @param __INTERRUPT__ specifies the DAC interrupt.
283294 * This parameter can be any combination of the following values:
284- * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
285- * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
295+ * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
296+ * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
286297 * @retval None
287298 */
288299#define __HAL_DAC_DISABLE_IT (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
@@ -291,18 +302,19 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
291302 * @param __HANDLE__ DAC handle
292303 * @param __INTERRUPT__ DAC interrupt source to check
293304 * This parameter can be any combination of the following values:
294- * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
295- * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
305+ * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
306+ * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
296307 * @retval State of interruption (SET or RESET)
297308 */
298- #define __HAL_DAC_GET_IT_SOURCE (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
309+ #define __HAL_DAC_GET_IT_SOURCE (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR\
310+ & (__INTERRUPT__)) == (__INTERRUPT__))
299311
300312/** @brief Get the selected DAC's flag status.
301313 * @param __HANDLE__ specifies the DAC handle.
302314 * @param __FLAG__ specifies the DAC flag to get.
303315 * This parameter can be any combination of the following values:
304- * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
305- * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
316+ * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
317+ * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
306318 * @retval None
307319 */
308320#define __HAL_DAC_GET_FLAG (__HANDLE__ , __FLAG__ ) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
@@ -311,8 +323,8 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
311323 * @param __HANDLE__ specifies the DAC handle.
312324 * @param __FLAG__ specifies the DAC flag to clear.
313325 * This parameter can be any combination of the following values:
314- * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
315- * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
326+ * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
327+ * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
316328 * @retval None
317329 */
318330#define __HAL_DAC_CLEAR_FLAG (__HANDLE__ , __FLAG__ ) (((__HANDLE__)->Instance->SR) = (__FLAG__))
@@ -336,7 +348,7 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
336348 ((ALIGN) == DAC_ALIGN_12B_L) || \
337349 ((ALIGN) == DAC_ALIGN_8B_R))
338350
339- #define IS_DAC_DATA (DATA ) ((DATA) <= 0xFFF0U )
351+ #define IS_DAC_DATA (DATA ) ((DATA) <= 0xFFF0UL )
340352
341353/**
342354 * @}
@@ -373,9 +385,7 @@ HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
373385HAL_StatusTypeDef HAL_DAC_Start_DMA (DAC_HandleTypeDef * hdac , uint32_t Channel , uint32_t * pData , uint32_t Length ,
374386 uint32_t Alignment );
375387HAL_StatusTypeDef HAL_DAC_Stop_DMA (DAC_HandleTypeDef * hdac , uint32_t Channel );
376-
377388void HAL_DAC_IRQHandler (DAC_HandleTypeDef * hdac );
378-
379389HAL_StatusTypeDef HAL_DAC_SetValue (DAC_HandleTypeDef * hdac , uint32_t Channel , uint32_t Alignment , uint32_t Data );
380390
381391void HAL_DAC_ConvCpltCallbackCh1 (DAC_HandleTypeDef * hdac );
@@ -399,7 +409,6 @@ HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DA
399409 */
400410/* Peripheral Control functions ***********************************************/
401411uint32_t HAL_DAC_GetValue (DAC_HandleTypeDef * hdac , uint32_t Channel );
402-
403412HAL_StatusTypeDef HAL_DAC_ConfigChannel (DAC_HandleTypeDef * hdac , DAC_ChannelConfTypeDef * sConfig , uint32_t Channel );
404413/**
405414 * @}
@@ -445,7 +454,6 @@ void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
445454#endif
446455
447456
448- #endif /*STM32F1xx_HAL_DAC_H */
457+ #endif /* STM32F1xx_HAL_DAC_H */
449458
450459/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
451-
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