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sabas1080
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variant: WL: add generic WL54CCU, WL55CCU, WLE4C(8-B-C)U and WLE5C
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‎README.md‎

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Original file line numberDiff line numberDiff line change
@@ -420,8 +420,11 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| Status | Device(s) | Name | Release | Notes |
422422
| :----: | :-------: | ---- | :-----: | :---- |
423+
| :yellow_heart: | STM32WL54CC<br>STM32WL55CC | Generic Board | **2.1.0** | |
423424
| :yellow_heart: | STM32WL55JC<br>STM32WL55JC | Generic Board | **2.1.0** | |
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| :yellow_heart: | STM32WLE4C8<br>STM32WLE4CB<br>STM32WLE4CC | Generic Board | **2.1.0** | |
424426
| :yellow_heart: | STM32WLE4J8<br>STM32WLE4JB<br>STM32WLE4JC | Generic Board | **2.1.0** | |
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| :yellow_heart: | STM32WLE5C8<br>STM32WLE5CB<br>STM32WLE5CC | Generic Board | **2.1.0** | |
425428
| :yellow_heart: | STM32WLE5J8<br>STM32WLE5JB<br>STM32WLE5JC | Generic Board | **2.1.0** | |
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### 3D printer boards

‎boards.txt‎

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Original file line numberDiff line numberDiff line change
@@ -5081,6 +5081,14 @@ GenWL.build.mcu=cortex-m4
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GenWL.build.series=STM32WLxx
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GenWL.build.cmsis_lib_gcc=arm_cortexM4lf_math
50835083

5084+
# Generic WL54CCUx
5085+
GenWL.menu.pnum.GENERIC_WL54CCUX=Generic WL54CCUx
5086+
GenWL.menu.pnum.GENERIC_WL54CCUX.upload.maximum_size=262144
5087+
GenWL.menu.pnum.GENERIC_WL54CCUX.upload.maximum_data_size=65536
5088+
GenWL.menu.pnum.GENERIC_WL54CCUX.build.board=GENERIC_WL54CCUX
5089+
GenWL.menu.pnum.GENERIC_WL54CCUX.build.product_line=STM32WL54xx
5090+
GenWL.menu.pnum.GENERIC_WL54CCUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
5091+
50845092
# Generic WL54JCIx
50855093
GenWL.menu.pnum.GENERIC_WL54JCIX=Generic WL54JCIx
50865094
GenWL.menu.pnum.GENERIC_WL54JCIX.upload.maximum_size=262144
@@ -5089,6 +5097,14 @@ GenWL.menu.pnum.GENERIC_WL54JCIX.build.board=GENERIC_WL54JCIX
50895097
GenWL.menu.pnum.GENERIC_WL54JCIX.build.product_line=STM32WL54xx
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GenWL.menu.pnum.GENERIC_WL54JCIX.build.variant=STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I
50915099

5100+
# Generic WL55CCUx
5101+
GenWL.menu.pnum.GENERIC_WL55CCUX=Generic WL55CCUx
5102+
GenWL.menu.pnum.GENERIC_WL55CCUX.upload.maximum_size=262144
5103+
GenWL.menu.pnum.GENERIC_WL55CCUX.upload.maximum_data_size=65536
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GenWL.menu.pnum.GENERIC_WL55CCUX.build.board=GENERIC_WL55CCUX
5105+
GenWL.menu.pnum.GENERIC_WL55CCUX.build.product_line=STM32WL55xx
5106+
GenWL.menu.pnum.GENERIC_WL55CCUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
5107+
50925108
# Generic WL55JCIx
50935109
GenWL.menu.pnum.GENERIC_WL55JCIX=Generic WL55JCIx
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GenWL.menu.pnum.GENERIC_WL55JCIX.upload.maximum_size=262144
@@ -5097,6 +5113,30 @@ GenWL.menu.pnum.GENERIC_WL55JCIX.build.board=GENERIC_WL55JCIX
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GenWL.menu.pnum.GENERIC_WL55JCIX.build.product_line=STM32WL55xx
50985114
GenWL.menu.pnum.GENERIC_WL55JCIX.build.variant=STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I
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5116+
# Generic WLE4C8Ux
5117+
GenWL.menu.pnum.GENERIC_WLE4C8UX=Generic WLE4C8Ux
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GenWL.menu.pnum.GENERIC_WLE4C8UX.upload.maximum_size=65536
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GenWL.menu.pnum.GENERIC_WLE4C8UX.upload.maximum_data_size=20480
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GenWL.menu.pnum.GENERIC_WLE4C8UX.build.board=GENERIC_WLE4C8UX
5121+
GenWL.menu.pnum.GENERIC_WLE4C8UX.build.product_line=STM32WLE4xx
5122+
GenWL.menu.pnum.GENERIC_WLE4C8UX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
5123+
5124+
# Generic WLE4CBUx
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GenWL.menu.pnum.GENERIC_WLE4CBUX=Generic WLE4CBUx
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GenWL.menu.pnum.GENERIC_WLE4CBUX.upload.maximum_size=131072
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GenWL.menu.pnum.GENERIC_WLE4CBUX.upload.maximum_data_size=49152
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GenWL.menu.pnum.GENERIC_WLE4CBUX.build.board=GENERIC_WLE4CBUX
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GenWL.menu.pnum.GENERIC_WLE4CBUX.build.product_line=STM32WLE4xx
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GenWL.menu.pnum.GENERIC_WLE4CBUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
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# Generic WLE4CCUx
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GenWL.menu.pnum.GENERIC_WLE4CCUX=Generic WLE4CCUx
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GenWL.menu.pnum.GENERIC_WLE4CCUX.upload.maximum_size=262144
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GenWL.menu.pnum.GENERIC_WLE4CCUX.upload.maximum_data_size=65536
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GenWL.menu.pnum.GENERIC_WLE4CCUX.build.board=GENERIC_WLE4CCUX
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GenWL.menu.pnum.GENERIC_WLE4CCUX.build.product_line=STM32WLE4xx
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GenWL.menu.pnum.GENERIC_WLE4CCUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
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51005140
# Generic WLE4J8Ix
51015141
GenWL.menu.pnum.GENERIC_WLE4J8IX=Generic WLE4J8Ix
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GenWL.menu.pnum.GENERIC_WLE4J8IX.upload.maximum_size=65536
@@ -5121,6 +5161,30 @@ GenWL.menu.pnum.GENERIC_WLE4JCIX.build.board=GENERIC_WLE4JCIX
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GenWL.menu.pnum.GENERIC_WLE4JCIX.build.product_line=STM32WLE4xx
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GenWL.menu.pnum.GENERIC_WLE4JCIX.build.variant=STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I
51235163

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# Generic WLE5C8Ux
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GenWL.menu.pnum.GENERIC_WLE5C8UX=Generic WLE5C8Ux
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GenWL.menu.pnum.GENERIC_WLE5C8UX.upload.maximum_size=65536
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GenWL.menu.pnum.GENERIC_WLE5C8UX.upload.maximum_data_size=20480
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GenWL.menu.pnum.GENERIC_WLE5C8UX.build.board=GENERIC_WLE5C8UX
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GenWL.menu.pnum.GENERIC_WLE5C8UX.build.product_line=STM32WLE5xx
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GenWL.menu.pnum.GENERIC_WLE5C8UX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
5171+
5172+
# Generic WLE5CBUx
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GenWL.menu.pnum.GENERIC_WLE5CBUX=Generic WLE5CBUx
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GenWL.menu.pnum.GENERIC_WLE5CBUX.upload.maximum_size=131072
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GenWL.menu.pnum.GENERIC_WLE5CBUX.upload.maximum_data_size=49152
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GenWL.menu.pnum.GENERIC_WLE5CBUX.build.board=GENERIC_WLE5CBUX
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GenWL.menu.pnum.GENERIC_WLE5CBUX.build.product_line=STM32WLE5xx
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GenWL.menu.pnum.GENERIC_WLE5CBUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
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# Generic WLE5CCUx
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GenWL.menu.pnum.GENERIC_WLE5CCUX=Generic WLE5CCUx
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GenWL.menu.pnum.GENERIC_WLE5CCUX.upload.maximum_size=262144
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GenWL.menu.pnum.GENERIC_WLE5CCUX.upload.maximum_data_size=65536
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GenWL.menu.pnum.GENERIC_WLE5CCUX.build.board=GENERIC_WLE5CCUX
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GenWL.menu.pnum.GENERIC_WLE5CCUX.build.product_line=STM32WLE5xx
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GenWL.menu.pnum.GENERIC_WLE5CCUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
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# Generic WLE5J8Ix
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GenWL.menu.pnum.GENERIC_WLE5J8IX=Generic WLE5J8Ix
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GenWL.menu.pnum.GENERIC_WLE5J8IX.upload.maximum_size=65536

‎variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/generic_clock.c‎

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@@ -23,8 +23,36 @@
2323
*/
2424
WEAK void SystemClock_Config(void)
2525
{
26-
/* SystemClock_Config can be generated by STM32CubeMX */
27-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
26+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
28+
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/** Configure the main internal regulator output voltage
30+
*/
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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/** Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
40+
Error_Handler();
41+
}
42+
/** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
43+
*/
44+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK3 | RCC_CLOCKTYPE_HCLK
45+
| RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1
46+
| RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
51+
RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1;
52+
53+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
54+
Error_Handler();
55+
}
2856
}
2957

3058
#endif /* ARDUINO_GENERIC_* */

‎variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/ldscript.ld‎

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/*
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******************************************************************************
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**
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** File : ldscript.ld
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**
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** Author : STM32CubeIDE
7+
**
8+
** Abstract : Linker script for STM32WL55xC Device
9+
** 256Kbytes FLASH
10+
** 64Kbytes RAM
11+
**
12+
** Set heap size, stack size and stack location according
13+
** to application requirements.
14+
**
15+
** Set memory bank area and size if external memory is used.
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**
17+
** Target : STMicroelectronics STM32
18+
**
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** Distribution: The file is distributed as is without any warranty
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** of any kind.
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**
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*****************************************************************************
23+
** @attention
24+
**
25+
** <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
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** All rights reserved.</center></h2>
27+
**
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** This software component is licensed by ST under BSD 3-Clause license,
29+
** the "License"; You may not use this file except in compliance with the
30+
** License. You may obtain a copy of the License at:
31+
** opensource.org/licenses/BSD-3-Clause
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**
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*****************************************************************************
34+
*/
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36+
/* Entry Point */
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ENTRY(Reset_Handler)
38+
39+
/* Highest address of the user mode stack */
40+
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
41+
42+
_Min_Heap_Size = 0x200 ; /* required amount of heap */
43+
_Min_Stack_Size = 0x400 ; /* required amount of stack */
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/* Memories definition */
46+
MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
49+
FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
50+
}
51+
52+
/* Sections */
53+
SECTIONS
54+
{
55+
/* The startup code into "FLASH" Rom type memory */
56+
.isr_vector :
57+
{
58+
. = ALIGN(4);
59+
KEEP(*(.isr_vector)) /* Startup code */
60+
. = ALIGN(4);
61+
} >FLASH
62+
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/* The program code and other data into "FLASH" Rom type memory */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
68+
*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
72+
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
79+
80+
/* Constant data into "FLASH" Rom type memory */
81+
.rodata :
82+
{
83+
. = ALIGN(4);
84+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
86+
. = ALIGN(4);
87+
} >FLASH
88+
89+
.ARM.extab : {
90+
. = ALIGN(4);
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*(.ARM.extab* .gnu.linkonce.armextab.*)
92+
. = ALIGN(4);
93+
} >FLASH
94+
95+
.ARM : {
96+
. = ALIGN(4);
97+
__exidx_start = .;
98+
*(.ARM.exidx*)
99+
__exidx_end = .;
100+
. = ALIGN(4);
101+
} >FLASH
102+
103+
.preinit_array :
104+
{
105+
. = ALIGN(4);
106+
PROVIDE_HIDDEN (__preinit_array_start = .);
107+
KEEP (*(.preinit_array*))
108+
PROVIDE_HIDDEN (__preinit_array_end = .);
109+
. = ALIGN(4);
110+
} >FLASH
111+
112+
.init_array :
113+
{
114+
. = ALIGN(4);
115+
PROVIDE_HIDDEN (__init_array_start = .);
116+
KEEP (*(SORT(.init_array.*)))
117+
KEEP (*(.init_array*))
118+
PROVIDE_HIDDEN (__init_array_end = .);
119+
. = ALIGN(4);
120+
} >FLASH
121+
122+
.fini_array :
123+
{
124+
. = ALIGN(4);
125+
PROVIDE_HIDDEN (__fini_array_start = .);
126+
KEEP (*(SORT(.fini_array.*)))
127+
KEEP (*(.fini_array*))
128+
PROVIDE_HIDDEN (__fini_array_end = .);
129+
. = ALIGN(4);
130+
} >FLASH
131+
132+
/* Used by the startup to initialize data */
133+
_sidata = LOADADDR(.data);
134+
135+
/* Initialized data sections into "RAM" Ram type memory */
136+
.data :
137+
{
138+
. = ALIGN(4);
139+
_sdata = .; /* create a global symbol at data start */
140+
*(.data) /* .data sections */
141+
*(.data*) /* .data* sections */
142+
*(.RamFunc) /* .RamFunc sections */
143+
*(.RamFunc*) /* .RamFunc* sections */
144+
145+
. = ALIGN(4);
146+
_edata = .; /* define a global symbol at data end */
147+
148+
} >RAM AT> FLASH
149+
150+
/* Uninitialized data section into "RAM" Ram type memory */
151+
. = ALIGN(4);
152+
.bss :
153+
{
154+
/* This is used by the startup in order to initialize the .bss section */
155+
_sbss = .; /* define a global symbol at bss start */
156+
__bss_start__ = _sbss;
157+
*(.bss)
158+
*(.bss*)
159+
*(COMMON)
160+
161+
. = ALIGN(4);
162+
_ebss = .; /* define a global symbol at bss end */
163+
__bss_end__ = _ebss;
164+
} >RAM
165+
166+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
167+
._user_heap_stack :
168+
{
169+
. = ALIGN(8);
170+
PROVIDE ( end = . );
171+
PROVIDE ( _end = . );
172+
. = . + _Min_Heap_Size;
173+
. = . + _Min_Stack_Size;
174+
. = ALIGN(8);
175+
} >RAM
176+
177+
/* Remove information from the compiler libraries */
178+
/DISCARD/ :
179+
{
180+
libc.a ( * )
181+
libm.a ( * )
182+
libgcc.a ( * )
183+
}
184+
185+
.ARM.attributes 0 : { *(.ARM.attributes) }
186+
}

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