66 *
77 * 1. This file provides two functions and one global variable to be called from
88 * user application:
9- * - SystemInit(): This function is called at startup just after reset and
9+ * - SystemInit(): This function is called at startup just after reset and
1010 * before branch to main program. This call is made inside
1111 * the "startup_stm32f3xx.s" file.
1212 *
8484/** @addtogroup STM32F3xx_System_Private_Defines
8585 * @{
8686 */
87-
88- /*!< Uncomment the following line if you need to relocate your vector Table in
89- Internal SRAM. */
90- /* #define VECT_TAB_SRAM */
9187#ifndef VECT_TAB_OFFSET
92- #define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field.
93- This value must be a multiple of 0x200. */
88+ #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
89+ This value must be a multiple of 0x200. */
90+ #else
91+ #define USER_VECT_TAB_ADDRESS
9492#endif
93+
94+ /* Note: Following vector table addresses must be defined in line with linker
95+ configuration. */
96+ /*!< Uncomment the following line if you need to relocate the vector table
97+ anywhere in Flash or Sram, else the vector table is kept at the automatic
98+ remap of boot address selected */
99+ /* #define USER_VECT_TAB_ADDRESS */
100+
101+ #if defined(USER_VECT_TAB_ADDRESS )
102+ /*!< Uncomment the following line if you need to relocate your vector Table
103+ in Sram else user remap will be done in Flash. */
104+ /* #define VECT_TAB_SRAM */
105+ #if defined(VECT_TAB_SRAM )
106+ #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
107+ This value must be a multiple of 0x200. */
108+ #else
109+ #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
110+ This value must be a multiple of 0x200. */
111+ #endif /* VECT_TAB_SRAM */
112+ #endif /* USER_VECT_TAB_ADDRESS */
113+
114+ /******************************************************************************/
95115/**
96116 * @}
97117 */
112132 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
113133 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
114134 Note: If you use this function to configure the system clock there is no need to
115- call the 2 first functions listed above, since SystemCoreClock variable is
135+ call the 2 first functions listed above, since SystemCoreClock variable is
116136 updated automatically.
117137 */
118138uint32_t SystemCoreClock = 8000000 ;
@@ -144,11 +164,10 @@ const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
144164 */
145165void SystemInit (void )
146166{
147- /* FPU settings --------------------------------------------------------------*/
148- #if (__FPU_PRESENT == 1 ) && (__FPU_USED == 1 )
149- SCB -> CPACR |= ((3UL << 10 * 2 )|(3UL << 11 * 2 )); /* set CP10 and CP11 Full Access */
150- #endif
151-
167+ /* FPU settings --------------------------------------------------------------*/
168+ #if (__FPU_PRESENT == 1 ) && (__FPU_USED == 1 )
169+ SCB -> CPACR |= ((3UL << 10 * 2 )|(3UL << 11 * 2 )); /* set CP10 and CP11 Full Access */
170+ #endif
152171 /* Reset the RCC clock configuration to the default reset state ------------*/
153172 /* Set HSION bit */
154173 RCC -> CR |= 0x00000001U ;
@@ -174,11 +193,10 @@ void SystemInit(void)
174193 /* Disable all interrupts */
175194 RCC -> CIR = 0x00000000U ;
176195
177- #ifdef VECT_TAB_SRAM
178- SCB -> VTOR = SRAM_BASE | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal SRAM */
179- #else
180- SCB -> VTOR = FLASH_BASE | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal FLASH */
181- #endif
196+ /* Configure the Vector Table location -------------------------------------*/
197+ #if defined(USER_VECT_TAB_ADDRESS )
198+ SCB -> VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET ; /* Vector Table Relocation */
199+ #endif /* USER_VECT_TAB_ADDRESS */
182200}
183201
184202/**
@@ -250,7 +268,7 @@ void SystemCoreClockUpdate (void)
250268 /* HSI oscillator clock selected as PREDIV1 clock entry */
251269 SystemCoreClock = (HSI_VALUE / predivfactor ) * pllmull ;
252270 }
253- #else
271+ #else
254272 if (pllsource == RCC_CFGR_PLLSRC_HSI_DIV2 )
255273 {
256274 /* HSI oscillator clock divided by 2 selected as PLL clock entry */
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