@@ -117,10 +117,34 @@ typedef enum
117117 (((__PIN__) & SYSCFG_FASTMODEPLUS_PB8) == SYSCFG_FASTMODEPLUS_PB8) || \
118118 (((__PIN__) & SYSCFG_FASTMODEPLUS_PB9) == SYSCFG_FASTMODEPLUS_PB9))
119119
120+ /**
121+ * @}
122+ */
120123#endif /* ! SYSCFG_PMCR_BOOSTEN */
124+
125+
126+ #if defined(SYSCFG_ADC2ALT_ADC2_ROUT0 ) || defined(SYSCFG_ADC2ALT_ADC2_ROUT1 )
127+ /** @defgroup SYSCFG_Adc2_Alternate_Connection SYSCFG ADC2 Alternate Connection
128+ * @{
129+ */
130+
131+ /** @brief Adc2 Alternate Connection on Vinp[16] and Vinp[17]
132+ */
133+ #define SYSCFG_ADC2_ROUT0_DAC1_1 ((uint32_t)0x00000000) /*!< DAC1_out1 connected to ADC2 VINP[16] */
134+ #define SYSCFG_ADC2_ROUT0_VBAT4 SYSCFG_ADC2ALT_ADC2_ROUT0 /*!< VBAT/4 connected to ADC2 VINP[16] */
135+ #define SYSCFG_ADC2_ROUT1_DAC1_2 ((uint32_t)0x00000000) /*!< DAC1_out2 connected to ADC2 VINP[17] */
136+ #define SYSCFG_ADC2_ROUT1_VREFINT SYSCFG_ADC2ALT_ADC2_ROUT1 /*!< VREFINT connected to ADC2 VINP[17] */
137+
138+ #define IS_SYSCFG_ADC2ALT_ROUT0 (__VALUE__ ) (((__VALUE__) == SYSCFG_ADC2_ROUT0_DAC1_1) || \
139+ ((__VALUE__) == SYSCFG_ADC2_ROUT0_VBAT4))
140+ #define IS_SYSCFG_ADC2ALT_ROUT1 (__VALUE__ ) (((__VALUE__) == SYSCFG_ADC2_ROUT1_DAC1_2) || \
141+ ((__VALUE__) == SYSCFG_ADC2_ROUT1_VREFINT))
142+
121143/**
122144 * @}
123145 */
146+ #endif /*SYSCFG_ADC2ALT_ADC2_ROUT0 || SYSCFG_ADC2ALT_ADC2_ROUT1*/
147+
124148
125149/** @defgroup SYSCFG_Ethernet_Config Ethernet Config
126150 * @{
@@ -145,10 +169,6 @@ typedef enum
145169#define SYSCFG_SWITCH_PC3 SYSCFG_PMCR_PC3SO /*!< Select PC3 analog switch */
146170
147171
148- #define IS_SYSCFG_ANALOG_SWITCH (SWITCH ) ((((SWITCH) & SYSCFG_SWITCH_PA0) == SYSCFG_SWITCH_PA0)|| \
149- (((SWITCH) & SYSCFG_SWITCH_PA1) == SYSCFG_SWITCH_PA1) || \
150- (((SWITCH) & SYSCFG_SWITCH_PC2) == SYSCFG_SWITCH_PC2) || \
151- (((SWITCH) & SYSCFG_SWITCH_PC3) == SYSCFG_SWITCH_PC3))
152172
153173
154174#define SYSCFG_SWITCH_PA0_OPEN SYSCFG_PMCR_PA0SO /*!< PA0 analog switch opened */
@@ -160,6 +180,16 @@ typedef enum
160180#define SYSCFG_SWITCH_PC3_OPEN SYSCFG_PMCR_PC3SO /*!< PC3 analog switch opened */
161181#define SYSCFG_SWITCH_PC3_CLOSE ((uint32_t)0x00000000) /*!< PC3 analog switch closed */
162182
183+ /**
184+ * @}
185+ */
186+
187+ #define IS_SYSCFG_ANALOG_SWITCH (SWITCH ) ((((SWITCH) & SYSCFG_SWITCH_PA0) == SYSCFG_SWITCH_PA0)|| \
188+ (((SWITCH) & SYSCFG_SWITCH_PA1) == SYSCFG_SWITCH_PA1) || \
189+ (((SWITCH) & SYSCFG_SWITCH_PC2) == SYSCFG_SWITCH_PC2) || \
190+ (((SWITCH) & SYSCFG_SWITCH_PC3) == SYSCFG_SWITCH_PC3))
191+
192+
163193#define IS_SYSCFG_SWITCH_STATE (STATE ) ((((STATE) & SYSCFG_SWITCH_PA0_OPEN) == SYSCFG_SWITCH_PA0_OPEN) || \
164194 (((STATE) & SYSCFG_SWITCH_PA0_CLOSE) == SYSCFG_SWITCH_PA0_CLOSE) || \
165195 (((STATE) & SYSCFG_SWITCH_PA1_OPEN) == SYSCFG_SWITCH_PA1_OPEN) || \
@@ -168,9 +198,7 @@ typedef enum
168198 (((STATE) & SYSCFG_SWITCH_PC2_CLOSE) == SYSCFG_SWITCH_PC2_CLOSE) || \
169199 (((STATE) & SYSCFG_SWITCH_PC3_OPEN) == SYSCFG_SWITCH_PC3_OPEN) || \
170200 (((STATE) & SYSCFG_SWITCH_PC3_CLOSE) == SYSCFG_SWITCH_PC3_CLOSE))
171- /**
172- * @}
173- */
201+
174202
175203/** @defgroup SYSCFG_Boot_Config Boot Config
176204 * @{
@@ -327,6 +355,9 @@ typedef enum
327355#define EXTI_LINE86 ((uint32_t)0x56) /* Not available in all family lines */
328356#define EXTI_LINE87 ((uint32_t)0x57)
329357#define EXTI_LINE88 ((uint32_t)0x58) /* Not available in all family lines */
358+ #define EXTI_LINE89 ((uint32_t)0x59) /* Not available in all family lines */
359+ #define EXTI_LINE90 ((uint32_t)0x5A) /* Not available in all family lines */
360+ #define EXTI_LINE91 ((uint32_t)0x5B) /* Not available in all family lines */
330361
331362#if defined(DUAL_CORE )
332363#define IS_HAL_EXTI_CONFIG_LINE (LINE ) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
@@ -349,13 +380,13 @@ typedef enum
349380 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
350381 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
351382 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
352- ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
353- ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
354- ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
355- ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
356- ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
357- ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
358- ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE51) || \
383+ ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
384+ ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
385+ ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
386+ ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
387+ ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
388+ ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
389+ ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE51) || \
359390 ((LINE) == EXTI_LINE85) || ((LINE) == EXTI_LINE86))
360391#endif /* DUAL_CORE */
361392
@@ -444,7 +475,8 @@ typedef enum
444475 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
445476 ((LINE) == EXTI_LINE85) || \
446477 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
447- ((LINE) == EXTI_LINE88))
478+ ((LINE) == EXTI_LINE88) || ((LINE) == EXTI_LINE89) || \
479+ ((LINE) == EXTI_LINE90) || ((LINE) == EXTI_LINE91))
448480#endif /*DUAL_CORE*/
449481
450482#if defined(DUAL_CORE )
@@ -530,7 +562,8 @@ typedef enum
530562 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
531563 ((LINE) == EXTI_LINE85) || \
532564 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
533- ((LINE) == EXTI_LINE88))
565+ ((LINE) == EXTI_LINE88) || ((LINE) == EXTI_LINE89) || \
566+ ((LINE) == EXTI_LINE90) || ((LINE) == EXTI_LINE91))
534567#endif /*DUAL_CORE*/
535568
536569#if defined(DUAL_CORE )
@@ -608,7 +641,7 @@ typedef enum
608641 ((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \
609642 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
610643 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
611- ((LINE) == EXTI_LINE53))
644+ ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE88) )
612645#else
613646#define IS_EXTI_D3_LINE (LINE ) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
614647 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
@@ -667,10 +700,10 @@ typedef enum
667700
668701
669702/* Exported macro ------------------------------------------------------------*/
703+ #if defined(DUAL_CORE )
670704/** @defgroup ART_Exported_Macros ART Exported Macros
671705 * @{
672706 */
673- #if defined(DUAL_CORE )
674707
675708/** @brief ART Enable Macro.
676709 * Enable the Cortex-M4 ART cache.
@@ -687,10 +720,10 @@ typedef enum
687720 */
688721#define __HAL_ART_CONFIG_BASE_ADDRESS (__BASE_ADDRESS__ ) MODIFY_REG(ART->CTR, ART_CTR_PCACHEADDR, (((__BASE_ADDRESS__) >> 12U) & 0x000FFF00UL))
689722
690- #endif /* DUAL_CORE */
691723/**
692724 * @}
693725 */
726+ #endif /* DUAL_CORE */
694727
695728/** @defgroup SYSCFG_Exported_Macros SYSCFG Exported Macros
696729 * @{
@@ -820,8 +853,19 @@ typedef enum
820853#define __HAL_DBGMCU_FREEZE_I2C1 () (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C1))
821854#define __HAL_DBGMCU_FREEZE_I2C2 () (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C2))
822855#define __HAL_DBGMCU_FREEZE_I2C3 () (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C3))
856+ #if defined(I2C5 )
857+ #define __HAL_DBGMCU_FREEZE_I2C5 () (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C5))
858+ #endif /*I2C5*/
859+ #if defined(DBGMCU_APB1HFZ1_DBG_FDCAN )
823860#define __HAL_DBGMCU_FREEZE_FDCAN () (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_FDCAN))
861+ #endif /*DBGMCU_APB1HFZ1_DBG_FDCAN*/
824862
863+ #if defined(TIM23 )
864+ #define __HAL_DBGMCU_FREEZE_TIM23 () (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_TIM23))
865+ #endif /*TIM23*/
866+ #if defined(TIM24 )
867+ #define __HAL_DBGMCU_FREEZE_TIM24 () (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_TIM24))
868+ #endif /*TIM24*/
825869
826870#define __HAL_DBGMCU_FREEZE_TIM1 () (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM1))
827871#define __HAL_DBGMCU_FREEZE_TIM8 () (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM8))
@@ -854,8 +898,19 @@ typedef enum
854898#define __HAL_DBGMCU_UnFreeze_I2C1 () (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C1))
855899#define __HAL_DBGMCU_UnFreeze_I2C2 () (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C2))
856900#define __HAL_DBGMCU_UnFreeze_I2C3 () (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C3))
901+ #if defined(I2C5 )
902+ #define __HAL_DBGMCU_UnFreeze_I2C5 () (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C5))
903+ #endif /*I2C5*/
904+ #if defined(DBGMCU_APB1HFZ1_DBG_FDCAN )
857905#define __HAL_DBGMCU_UnFreeze_FDCAN () (DBGMCU->APB1HFZ1 &= ~ (DBGMCU_APB1HFZ1_DBG_FDCAN))
906+ #endif /*DBGMCU_APB1HFZ1_DBG_FDCAN*/
858907
908+ #if defined(TIM23 )
909+ #define __HAL_DBGMCU_UnFreeze_TIM23 () (DBGMCU->APB1HFZ1 &= ~ (DBGMCU_APB1HFZ1_DBG_TIM23))
910+ #endif /*TIM23*/
911+ #if defined(TIM24 )
912+ #define __HAL_DBGMCU_UnFreeze_TIM24 () (DBGMCU->APB1HFZ1 &= ~ (DBGMCU_APB1HFZ1_DBG_TIM24))
913+ #endif /*TIM24*/
859914
860915#define __HAL_DBGMCU_UnFreeze_TIM1 () (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM1))
861916#define __HAL_DBGMCU_UnFreeze_TIM8 () (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM8))
@@ -1060,6 +1115,12 @@ void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode);
10601115void HAL_SYSCFG_VREFBUF_TrimmingConfig (uint32_t TrimmingValue );
10611116HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF (void );
10621117void HAL_SYSCFG_DisableVREFBUF (void );
1118+ #if defined(SYSCFG_ADC2ALT_ADC2_ROUT0 )
1119+ void HAL_SYSCFG_ADC2ALT_Rout0Config (uint32_t Adc2AltRout0 );
1120+ #endif /*SYSCFG_ADC2ALT_ADC2_ROUT0*/
1121+ #if defined(SYSCFG_ADC2ALT_ADC2_ROUT1 )
1122+ void HAL_SYSCFG_ADC2ALT_Rout1Config (uint32_t Adc2AltRout1 );
1123+ #endif /*SYSCFG_ADC2ALT_ADC2_ROUT1*/
10631124
10641125/**
10651126 * @}
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