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Add NUCLEO-L452RE-P support
Fixes #671 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
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‎README.md‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | [Nucleo L073RZ](http://www.st.com/en/evaluation-tools/nucleo-l073rz.html) | *1.4.0* | |
6969
| :green_heart: | [Nucleo L152RE](http://www.st.com/en/evaluation-tools/nucleo-l152re.html) | *1.0.0* | |
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| :green_heart: | [Nucleo L452RE](http://www.st.com/en/evaluation-tools/nucleo-l452re.html) | *1.5.0* | |
71+
| :yellow_heart: | [Nucleo L452RE-P](http://www.st.com/en/evaluation-tools/nucleo-l452re-p.html) | **1.8.0** | |
7172
| :green_heart: | [Nucleo L476RG](http://www.st.com/en/evaluation-tools/nucleo-l476rg.html) | *0.1.0* | |
7273
| :green_heart: | [P-Nucleo-WB55RG](https://www.st.com/en/evaluation-tools/p-nucleo-wb55.html) | *1.6.0* | No BLE support |
7374

‎boards.txt‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -358,6 +358,19 @@ Nucleo_64.menu.pnum.NUCLEO_L452RE.build.product_line=STM32L452xx
358358
Nucleo_64.menu.pnum.NUCLEO_L452RE.build.variant=NUCLEO_L452RE
359359
Nucleo_64.menu.pnum.NUCLEO_L452RE.build.cmsis_lib_gcc=arm_cortexM4l_math
360360

361+
# NUCLEO_L452RE-P board
362+
Nucleo_64.menu.pnum.NUCLEO_L452REP=Nucleo L452RE-P
363+
Nucleo_64.menu.pnum.NUCLEO_L452REP.node=NODE_L452RE
364+
Nucleo_64.menu.pnum.NUCLEO_L452REP.upload.maximum_size=524288
365+
Nucleo_64.menu.pnum.NUCLEO_L452REP.upload.maximum_data_size=163840
366+
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.mcu=cortex-m4
367+
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
368+
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.board=NUCLEO_L452RE_P
369+
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.series=STM32L4xx
370+
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.product_line=STM32L452xx
371+
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.variant=NUCLEO_L452RE
372+
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.cmsis_lib_gcc=arm_cortexM4l_math
373+
361374
# NUCLEO_L476RG board
362375
# Support: Serial1 (USART1 on PA10, PA9)
363376
Nucleo_64.menu.pnum.NUCLEO_L476RG=Nucleo L476RG

‎variants/NUCLEO_L452RE/PeripheralPins.c‎

Lines changed: 59 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -3,30 +3,13 @@
33
* Copyright (c) 2019, STMicroelectronics
44
* All rights reserved.
55
*
6-
* Redistribution and use in source and binary forms, with or without
7-
* modification, are permitted provided that the following conditions are met:
6+
* This software component is licensed by ST under BSD 3-Clause license,
7+
* the "License"; You may not use this file except in compliance with the
8+
* License. You may obtain a copy of the License at:
9+
* opensource.org/licenses/BSD-3-Clause
810
*
9-
* 1. Redistributions of source code must retain the above copyright notice,
10-
* this list of conditions and the following disclaimer.
11-
* 2. Redistributions in binary form must reproduce the above copyright notice,
12-
* this list of conditions and the following disclaimer in the documentation
13-
* and/or other materials provided with the distribution.
14-
* 3. Neither the name of STMicroelectronics nor the names of its contributors
15-
* may be used to endorse or promote products derived from this software
16-
* without specific prior written permission.
17-
*
18-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19-
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20-
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22-
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23-
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24-
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25-
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26-
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27-
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2811
*******************************************************************************
29-
* Automatically generated from STM32L452RETxP.xml
12+
* Automatically generated from STM32L452R(C-E)Tx.xml and STM32L452RETxP.xml
3013
*/
3114
#include "Arduino.h"
3215
#include "PeripheralPins.h"
@@ -46,16 +29,27 @@ WEAK const PinMap PinMap_ADC[] = {
4629
// {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
4730
// {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
4831
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
49-
// {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
32+
#ifdef ARDUINO_NUCLEO_L452RE
33+
// {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 - LED
34+
#else
35+
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
36+
#endif
5037
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
5138
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
5239
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
40+
#ifdef ARDUINO_NUCLEO_L452RE
41+
// {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16
42+
#else
5343
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16
44+
#endif
5445
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
5546
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
5647
{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
5748
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
5849
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
50+
#ifdef ARDUINO_NUCLEO_L452RE
51+
// {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
52+
#endif
5953
{NC, NP, 0}
6054
};
6155
#endif
@@ -75,14 +69,14 @@ WEAK const PinMap PinMap_DAC[] = {
7569
WEAK const PinMap PinMap_I2C_SDA[] = {
7670
{PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
7771
{PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
78-
// {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
79-
{PB_7, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)},
72+
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
73+
// {PB_7, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)},
8074
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
8175
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
8276
// {PB_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)},
8377
{PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
84-
{PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
85-
// {PC_1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C4)},
78+
// {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
79+
{PC_1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C4)},
8680
{NC, NP, 0}
8781
};
8882
#endif
@@ -97,8 +91,8 @@ WEAK const PinMap PinMap_I2C_SCL[] = {
9791
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
9892
// {PB_10, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)},
9993
{PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
100-
{PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
101-
// {PC_0, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C4)},
94+
// {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
95+
{PC_0, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C4)},
10296
{NC, NP, 0}
10397
};
10498
#endif
@@ -154,8 +148,13 @@ WEAK const PinMap PinMap_PWM[] = {
154148
#ifdef HAL_UART_MODULE_ENABLED
155149
WEAK const PinMap PinMap_UART_TX[] = {
156150
{PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
151+
#ifdef ARDUINO_NUCLEO_L452RE
157152
// {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
158153
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
154+
#else
155+
{PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
156+
//{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
157+
#endif
159158
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
160159
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
161160
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
@@ -171,14 +170,22 @@ WEAK const PinMap PinMap_UART_TX[] = {
171170
#ifdef HAL_UART_MODULE_ENABLED
172171
WEAK const PinMap PinMap_UART_RX[] = {
173172
{PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
173+
#ifdef ARDUINO_NUCLEO_L452RE
174174
// {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
175175
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
176+
#else
177+
{PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
178+
//{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
179+
#endif
176180
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
177181
{PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)},
178182
{PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
179183
{PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
180184
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
181185
{PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
186+
#ifdef ARDUINO_NUCLEO_L452RE
187+
{PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
188+
#endif
182189
// {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
183190
{PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
184191
{NC, NP, 0}
@@ -196,6 +203,9 @@ WEAK const PinMap PinMap_UART_RTS[] = {
196203
{PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
197204
{PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
198205
{PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
206+
#ifdef ARDUINO_NUCLEO_L452RE
207+
{PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
208+
#endif
199209
{NC, NP, 0}
200210
};
201211
#endif
@@ -323,3 +333,23 @@ WEAK const PinMap PinMap_USB[] = {
323333
//*** No USB_OTG_FS ***
324334

325335
//*** No USB_OTG_HS ***
336+
337+
//*** SD ***
338+
339+
#ifdef HAL_SD_MODULE_ENABLED
340+
#ifdef ARDUINO_NUCLEO_L452RE
341+
WEAK const PinMap PinMap_SD[] = {
342+
{PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4
343+
{PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5
344+
{PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6
345+
{PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7
346+
{PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0
347+
{PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1
348+
{PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2
349+
{PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3
350+
{PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK
351+
{PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD
352+
{NC, NP, 0}
353+
};
354+
#endif
355+
#endif

‎variants/NUCLEO_L452RE/ldscript.ld‎

Lines changed: 35 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,14 @@
11
/*
2-
*****************************************************************************
2+
******************************************************************************
33
**
44
55
** File : ldscript.ld
66
**
7-
** Abstract : Linker script for STM32L452RE Device with
8-
** 512KByte FLASH, 160KByte RAM
7+
** Author : Auto-generated by STM32CubeIDE
8+
**
9+
** Abstract : Linker script for NUCLEO-L452RE(-P) Board embedding STM32L452RETx(P) Device from STM32L4 series
10+
** 512Kbytes FLASH
11+
** 160Kbytes RAM
912
**
1013
** Set heap size, stack size and stack location according
1114
** to application requirements.
@@ -14,13 +17,13 @@
1417
**
1518
** Target : STMicroelectronics STM32
1619
**
17-
** Distribution: The file is distributed as is, without any warranty
20+
** Distribution: The file is distributed as is without any warranty
1821
** of any kind.
1922
**
2023
*****************************************************************************
2124
** @attention
2225
**
23-
** <h2><center>&copy; COPYRIGHT(c) 2014 Ac6</center></h2>
26+
** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
2427
**
2528
** Redistribution and use in source and binary forms, with or without modification,
2629
** are permitted provided that the following conditions are met:
@@ -29,7 +32,7 @@
2932
** 2. Redistributions in binary form must reproduce the above copyright notice,
3033
** this list of conditions and the following disclaimer in the documentation
3134
** and/or other materials provided with the distribution.
32-
** 3. Neither the name of Ac6 nor the names of its contributors
35+
** 3. Neither the name of STMicroelectronics nor the names of its contributors
3336
** may be used to endorse or promote products derived from this software
3437
** without specific prior written permission.
3538
**
@@ -51,30 +54,29 @@
5154
ENTRY(Reset_Handler)
5255

5356
/* Highest address of the user mode stack */
54-
_estack = 0x20028000; /* end of RAM */
55-
/* Generate a link error if heap and stack don't fit into RAM */
57+
_estack = 0x20028000; /* end of "RAM" Ram type memory */
5658
_Min_Heap_Size = 0x200; /* required amount of heap */
5759
_Min_Stack_Size = 0x400; /* required amount of stack */
5860

59-
/* Specify the memory areas */
61+
/* Memories definition */
6062
MEMORY
6163
{
6264
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 160K
6365
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
6466
}
6567

66-
/* Define output sections */
68+
/* Sections */
6769
SECTIONS
6870
{
69-
/* The startup code goes first into FLASH */
71+
/* The startup code into "FLASH" Rom type memory */
7072
.isr_vector :
7173
{
7274
. = ALIGN(4);
7375
KEEP(*(.isr_vector)) /* Startup code */
7476
. = ALIGN(4);
7577
} >FLASH
7678

77-
/* The program code and other data goes into FLASH */
79+
/* The program code and other data into "FLASH" Rom type memory */
7880
.text :
7981
{
8082
. = ALIGN(4);
@@ -91,7 +93,7 @@ SECTIONS
9193
_etext = .; /* define a global symbols at end of code */
9294
} >FLASH
9395

94-
/* Constant data goes into FLASH */
96+
/* Constant data into "FLASH" Rom type memory */
9597
.rodata :
9698
{
9799
. = ALIGN(4);
@@ -100,38 +102,50 @@ SECTIONS
100102
. = ALIGN(4);
101103
} >FLASH
102104

103-
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
105+
.ARM.extab : {
106+
. = ALIGN(4);
107+
*(.ARM.extab* .gnu.linkonce.armextab.*)
108+
. = ALIGN(4);
109+
} >FLASH
104110
.ARM : {
111+
. = ALIGN(4);
105112
__exidx_start = .;
106113
*(.ARM.exidx*)
107114
__exidx_end = .;
115+
. = ALIGN(4);
108116
} >FLASH
109117

110118
.preinit_array :
111119
{
120+
. = ALIGN(4);
112121
PROVIDE_HIDDEN (__preinit_array_start = .);
113122
KEEP (*(.preinit_array*))
114123
PROVIDE_HIDDEN (__preinit_array_end = .);
124+
. = ALIGN(4);
115125
} >FLASH
116126
.init_array :
117127
{
128+
. = ALIGN(4);
118129
PROVIDE_HIDDEN (__init_array_start = .);
119130
KEEP (*(SORT(.init_array.*)))
120131
KEEP (*(.init_array*))
121132
PROVIDE_HIDDEN (__init_array_end = .);
133+
. = ALIGN(4);
122134
} >FLASH
123135
.fini_array :
124136
{
137+
. = ALIGN(4);
125138
PROVIDE_HIDDEN (__fini_array_start = .);
126139
KEEP (*(SORT(.fini_array.*)))
127140
KEEP (*(.fini_array*))
128141
PROVIDE_HIDDEN (__fini_array_end = .);
142+
. = ALIGN(4);
129143
} >FLASH
130144

131-
/* used by the startup to initialize data */
145+
/* Used by the startup to initialize data */
132146
_sidata = LOADADDR(.data);
133147

134-
/* Initialized data sections goes into RAM, load LMA copy after code */
148+
/* Initialized data sections into "RAM" Ram type memory */
135149
.data :
136150
{
137151
. = ALIGN(4);
@@ -144,7 +158,7 @@ SECTIONS
144158
} >RAM AT> FLASH
145159

146160

147-
/* Uninitialized data section */
161+
/* Uninitialized data section into "RAM" Ram type memory */
148162
. = ALIGN(4);
149163
.bss :
150164
{
@@ -160,20 +174,20 @@ SECTIONS
160174
__bss_end__ = _ebss;
161175
} >RAM
162176

163-
/* User_heap_stack section, used to check that there is enough RAM left */
177+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
164178
._user_heap_stack :
165179
{
166-
. = ALIGN(4);
180+
. = ALIGN(8);
167181
PROVIDE ( end = . );
168182
PROVIDE ( _end = . );
169183
. = . + _Min_Heap_Size;
170184
. = . + _Min_Stack_Size;
171-
. = ALIGN(4);
185+
. = ALIGN(8);
172186
} >RAM
173187

174188

175189

176-
/* Remove information from the standard libraries */
190+
/* Remove information from the compiler libraries */
177191
/DISCARD/ :
178192
{
179193
libc.a ( * )

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