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Updated STM32F4xx CMSIS to v2.6.2
Included in STM32CubeF4 FW V1.17.0 Signed-off-by: Frederic.Pillon <frederic.pillon@st.com>
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‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xc.h‎

Lines changed: 43 additions & 90 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32f401xc.h
44
* @author MCD Application Team
5-
* @version V2.6.1
6-
* @date 14-February-2017
75
* @brief CMSIS STM32F401xC Device Peripheral Access Layer Header File.
86
*
97
* This file contains:
@@ -654,7 +652,6 @@ typedef struct
654652
#define FLASH_BASE 0x08000000U /*!< FLASH(up to 1 MB) base address in the alias region */
655653
#define SRAM1_BASE 0x20000000U /*!< SRAM1(64 KB) base address in the alias region */
656654
#define PERIPH_BASE 0x40000000U /*!< Peripheral base address in the alias region */
657-
#define BKPSRAM_BASE 0x40024000U /*!< Backup SRAM(4 KB) base address in the alias region */
658655
#define SRAM1_BB_BASE 0x22000000U /*!< SRAM1(64 KB) base address in the bit-band region */
659656
#define PERIPH_BB_BASE 0x42000000U /*!< Peripheral base address in the bit-band region */
660657
#define BKPSRAM_BB_BASE 0x42480000U /*!< Backup SRAM(4 KB) base address in the bit-band region */
@@ -6677,7 +6674,7 @@ typedef struct
66776674
#define USART_CR1_TCIE USART_CR1_TCIE_Msk /*!<Transmission Complete Interrupt Enable */
66786675
#define USART_CR1_TXEIE_Pos (7U)
66796676
#define USART_CR1_TXEIE_Msk (0x1U << USART_CR1_TXEIE_Pos) /*!< 0x00000080 */
6680-
#define USART_CR1_TXEIE USART_CR1_TXEIE_Msk /*!<PE Interrupt Enable */
6677+
#define USART_CR1_TXEIE USART_CR1_TXEIE_Msk /*!<TXE Interrupt Enable */
66816678
#define USART_CR1_PEIE_Pos (8U)
66826679
#define USART_CR1_PEIE_Msk (0x1U << USART_CR1_PEIE_Pos) /*!< 0x00000100 */
66836680
#define USART_CR1_PEIE USART_CR1_PEIE_Msk /*!<PE Interrupt Enable */
@@ -7512,92 +7509,6 @@ typedef struct
75127509
#define USB_OTG_DAINTMSK_OEPM_Msk (0xFFFFU << USB_OTG_DAINTMSK_OEPM_Pos) /*!< 0xFFFF0000 */
75137510
#define USB_OTG_DAINTMSK_OEPM USB_OTG_DAINTMSK_OEPM_Msk /*!< OUT EP interrupt mask bits */
75147511

7515-
/******************** Bit definition for OTG register ********************/
7516-
7517-
#define USB_OTG_CHNUM_Pos (0U)
7518-
#define USB_OTG_CHNUM_Msk (0xFU << USB_OTG_CHNUM_Pos) /*!< 0x0000000F */
7519-
#define USB_OTG_CHNUM USB_OTG_CHNUM_Msk /*!< Channel number */
7520-
#define USB_OTG_CHNUM_0 (0x1U << USB_OTG_CHNUM_Pos) /*!< 0x00000001 */
7521-
#define USB_OTG_CHNUM_1 (0x2U << USB_OTG_CHNUM_Pos) /*!< 0x00000002 */
7522-
#define USB_OTG_CHNUM_2 (0x4U << USB_OTG_CHNUM_Pos) /*!< 0x00000004 */
7523-
#define USB_OTG_CHNUM_3 (0x8U << USB_OTG_CHNUM_Pos) /*!< 0x00000008 */
7524-
#define USB_OTG_BCNT_Pos (4U)
7525-
#define USB_OTG_BCNT_Msk (0x7FFU << USB_OTG_BCNT_Pos) /*!< 0x00007FF0 */
7526-
#define USB_OTG_BCNT USB_OTG_BCNT_Msk /*!< Byte count */
7527-
7528-
#define USB_OTG_DPID_Pos (15U)
7529-
#define USB_OTG_DPID_Msk (0x3U << USB_OTG_DPID_Pos) /*!< 0x00018000 */
7530-
#define USB_OTG_DPID USB_OTG_DPID_Msk /*!< Data PID */
7531-
#define USB_OTG_DPID_0 (0x1U << USB_OTG_DPID_Pos) /*!< 0x00008000 */
7532-
#define USB_OTG_DPID_1 (0x2U << USB_OTG_DPID_Pos) /*!< 0x00010000 */
7533-
7534-
#define USB_OTG_PKTSTS_Pos (17U)
7535-
#define USB_OTG_PKTSTS_Msk (0xFU << USB_OTG_PKTSTS_Pos) /*!< 0x001E0000 */
7536-
#define USB_OTG_PKTSTS USB_OTG_PKTSTS_Msk /*!< Packet status */
7537-
#define USB_OTG_PKTSTS_0 (0x1U << USB_OTG_PKTSTS_Pos) /*!< 0x00020000 */
7538-
#define USB_OTG_PKTSTS_1 (0x2U << USB_OTG_PKTSTS_Pos) /*!< 0x00040000 */
7539-
#define USB_OTG_PKTSTS_2 (0x4U << USB_OTG_PKTSTS_Pos) /*!< 0x00080000 */
7540-
#define USB_OTG_PKTSTS_3 (0x8U << USB_OTG_PKTSTS_Pos) /*!< 0x00100000 */
7541-
7542-
#define USB_OTG_EPNUM_Pos (0U)
7543-
#define USB_OTG_EPNUM_Msk (0xFU << USB_OTG_EPNUM_Pos) /*!< 0x0000000F */
7544-
#define USB_OTG_EPNUM USB_OTG_EPNUM_Msk /*!< Endpoint number */
7545-
#define USB_OTG_EPNUM_0 (0x1U << USB_OTG_EPNUM_Pos) /*!< 0x00000001 */
7546-
#define USB_OTG_EPNUM_1 (0x2U << USB_OTG_EPNUM_Pos) /*!< 0x00000002 */
7547-
#define USB_OTG_EPNUM_2 (0x4U << USB_OTG_EPNUM_Pos) /*!< 0x00000004 */
7548-
#define USB_OTG_EPNUM_3 (0x8U << USB_OTG_EPNUM_Pos) /*!< 0x00000008 */
7549-
7550-
#define USB_OTG_FRMNUM_Pos (21U)
7551-
#define USB_OTG_FRMNUM_Msk (0xFU << USB_OTG_FRMNUM_Pos) /*!< 0x01E00000 */
7552-
#define USB_OTG_FRMNUM USB_OTG_FRMNUM_Msk /*!< Frame number */
7553-
#define USB_OTG_FRMNUM_0 (0x1U << USB_OTG_FRMNUM_Pos) /*!< 0x00200000 */
7554-
#define USB_OTG_FRMNUM_1 (0x2U << USB_OTG_FRMNUM_Pos) /*!< 0x00400000 */
7555-
#define USB_OTG_FRMNUM_2 (0x4U << USB_OTG_FRMNUM_Pos) /*!< 0x00800000 */
7556-
#define USB_OTG_FRMNUM_3 (0x8U << USB_OTG_FRMNUM_Pos) /*!< 0x01000000 */
7557-
7558-
/******************** Bit definition for OTG register ********************/
7559-
7560-
#define USB_OTG_CHNUM_Pos (0U)
7561-
#define USB_OTG_CHNUM_Msk (0xFU << USB_OTG_CHNUM_Pos) /*!< 0x0000000F */
7562-
#define USB_OTG_CHNUM USB_OTG_CHNUM_Msk /*!< Channel number */
7563-
#define USB_OTG_CHNUM_0 (0x1U << USB_OTG_CHNUM_Pos) /*!< 0x00000001 */
7564-
#define USB_OTG_CHNUM_1 (0x2U << USB_OTG_CHNUM_Pos) /*!< 0x00000002 */
7565-
#define USB_OTG_CHNUM_2 (0x4U << USB_OTG_CHNUM_Pos) /*!< 0x00000004 */
7566-
#define USB_OTG_CHNUM_3 (0x8U << USB_OTG_CHNUM_Pos) /*!< 0x00000008 */
7567-
#define USB_OTG_BCNT_Pos (4U)
7568-
#define USB_OTG_BCNT_Msk (0x7FFU << USB_OTG_BCNT_Pos) /*!< 0x00007FF0 */
7569-
#define USB_OTG_BCNT USB_OTG_BCNT_Msk /*!< Byte count */
7570-
7571-
#define USB_OTG_DPID_Pos (15U)
7572-
#define USB_OTG_DPID_Msk (0x3U << USB_OTG_DPID_Pos) /*!< 0x00018000 */
7573-
#define USB_OTG_DPID USB_OTG_DPID_Msk /*!< Data PID */
7574-
#define USB_OTG_DPID_0 (0x1U << USB_OTG_DPID_Pos) /*!< 0x00008000 */
7575-
#define USB_OTG_DPID_1 (0x2U << USB_OTG_DPID_Pos) /*!< 0x00010000 */
7576-
7577-
#define USB_OTG_PKTSTS_Pos (17U)
7578-
#define USB_OTG_PKTSTS_Msk (0xFU << USB_OTG_PKTSTS_Pos) /*!< 0x001E0000 */
7579-
#define USB_OTG_PKTSTS USB_OTG_PKTSTS_Msk /*!< Packet status */
7580-
#define USB_OTG_PKTSTS_0 (0x1U << USB_OTG_PKTSTS_Pos) /*!< 0x00020000 */
7581-
#define USB_OTG_PKTSTS_1 (0x2U << USB_OTG_PKTSTS_Pos) /*!< 0x00040000 */
7582-
#define USB_OTG_PKTSTS_2 (0x4U << USB_OTG_PKTSTS_Pos) /*!< 0x00080000 */
7583-
#define USB_OTG_PKTSTS_3 (0x8U << USB_OTG_PKTSTS_Pos) /*!< 0x00100000 */
7584-
7585-
#define USB_OTG_EPNUM_Pos (0U)
7586-
#define USB_OTG_EPNUM_Msk (0xFU << USB_OTG_EPNUM_Pos) /*!< 0x0000000F */
7587-
#define USB_OTG_EPNUM USB_OTG_EPNUM_Msk /*!< Endpoint number */
7588-
#define USB_OTG_EPNUM_0 (0x1U << USB_OTG_EPNUM_Pos) /*!< 0x00000001 */
7589-
#define USB_OTG_EPNUM_1 (0x2U << USB_OTG_EPNUM_Pos) /*!< 0x00000002 */
7590-
#define USB_OTG_EPNUM_2 (0x4U << USB_OTG_EPNUM_Pos) /*!< 0x00000004 */
7591-
#define USB_OTG_EPNUM_3 (0x8U << USB_OTG_EPNUM_Pos) /*!< 0x00000008 */
7592-
7593-
#define USB_OTG_FRMNUM_Pos (21U)
7594-
#define USB_OTG_FRMNUM_Msk (0xFU << USB_OTG_FRMNUM_Pos) /*!< 0x01E00000 */
7595-
#define USB_OTG_FRMNUM USB_OTG_FRMNUM_Msk /*!< Frame number */
7596-
#define USB_OTG_FRMNUM_0 (0x1U << USB_OTG_FRMNUM_Pos) /*!< 0x00200000 */
7597-
#define USB_OTG_FRMNUM_1 (0x2U << USB_OTG_FRMNUM_Pos) /*!< 0x00400000 */
7598-
#define USB_OTG_FRMNUM_2 (0x4U << USB_OTG_FRMNUM_Pos) /*!< 0x00800000 */
7599-
#define USB_OTG_FRMNUM_3 (0x8U << USB_OTG_FRMNUM_Pos) /*!< 0x01000000 */
7600-
76017512
/******************** Bit definition for USB_OTG_GRXFSIZ register ********************/
76027513
#define USB_OTG_GRXFSIZ_RXFD_Pos (0U)
76037514
#define USB_OTG_GRXFSIZ_RXFD_Msk (0xFFFFU << USB_OTG_GRXFSIZ_RXFD_Pos) /*!< 0x0000FFFF */
@@ -8243,6 +8154,48 @@ typedef struct
82438154
#define USB_OTG_PCGCCTL_PHYSUSP_Msk (0x1U << USB_OTG_PCGCCTL_PHYSUSP_Pos) /*!< 0x00000010 */
82448155
#define USB_OTG_PCGCCTL_PHYSUSP USB_OTG_PCGCCTL_PHYSUSP_Msk /*!<Bit 1 */
82458156

8157+
/* Legacy define */
8158+
/******************** Bit definition for OTG register ********************/
8159+
#define USB_OTG_CHNUM_Pos (0U)
8160+
#define USB_OTG_CHNUM_Msk (0xFU << USB_OTG_CHNUM_Pos) /*!< 0x0000000F */
8161+
#define USB_OTG_CHNUM USB_OTG_CHNUM_Msk /*!< Channel number */
8162+
#define USB_OTG_CHNUM_0 (0x1U << USB_OTG_CHNUM_Pos) /*!< 0x00000001 */
8163+
#define USB_OTG_CHNUM_1 (0x2U << USB_OTG_CHNUM_Pos) /*!< 0x00000002 */
8164+
#define USB_OTG_CHNUM_2 (0x4U << USB_OTG_CHNUM_Pos) /*!< 0x00000004 */
8165+
#define USB_OTG_CHNUM_3 (0x8U << USB_OTG_CHNUM_Pos) /*!< 0x00000008 */
8166+
#define USB_OTG_BCNT_Pos (4U)
8167+
#define USB_OTG_BCNT_Msk (0x7FFU << USB_OTG_BCNT_Pos) /*!< 0x00007FF0 */
8168+
#define USB_OTG_BCNT USB_OTG_BCNT_Msk /*!< Byte count */
8169+
8170+
#define USB_OTG_DPID_Pos (15U)
8171+
#define USB_OTG_DPID_Msk (0x3U << USB_OTG_DPID_Pos) /*!< 0x00018000 */
8172+
#define USB_OTG_DPID USB_OTG_DPID_Msk /*!< Data PID */
8173+
#define USB_OTG_DPID_0 (0x1U << USB_OTG_DPID_Pos) /*!< 0x00008000 */
8174+
#define USB_OTG_DPID_1 (0x2U << USB_OTG_DPID_Pos) /*!< 0x00010000 */
8175+
8176+
#define USB_OTG_PKTSTS_Pos (17U)
8177+
#define USB_OTG_PKTSTS_Msk (0xFU << USB_OTG_PKTSTS_Pos) /*!< 0x001E0000 */
8178+
#define USB_OTG_PKTSTS USB_OTG_PKTSTS_Msk /*!< Packet status */
8179+
#define USB_OTG_PKTSTS_0 (0x1U << USB_OTG_PKTSTS_Pos) /*!< 0x00020000 */
8180+
#define USB_OTG_PKTSTS_1 (0x2U << USB_OTG_PKTSTS_Pos) /*!< 0x00040000 */
8181+
#define USB_OTG_PKTSTS_2 (0x4U << USB_OTG_PKTSTS_Pos) /*!< 0x00080000 */
8182+
#define USB_OTG_PKTSTS_3 (0x8U << USB_OTG_PKTSTS_Pos) /*!< 0x00100000 */
8183+
8184+
#define USB_OTG_EPNUM_Pos (0U)
8185+
#define USB_OTG_EPNUM_Msk (0xFU << USB_OTG_EPNUM_Pos) /*!< 0x0000000F */
8186+
#define USB_OTG_EPNUM USB_OTG_EPNUM_Msk /*!< Endpoint number */
8187+
#define USB_OTG_EPNUM_0 (0x1U << USB_OTG_EPNUM_Pos) /*!< 0x00000001 */
8188+
#define USB_OTG_EPNUM_1 (0x2U << USB_OTG_EPNUM_Pos) /*!< 0x00000002 */
8189+
#define USB_OTG_EPNUM_2 (0x4U << USB_OTG_EPNUM_Pos) /*!< 0x00000004 */
8190+
#define USB_OTG_EPNUM_3 (0x8U << USB_OTG_EPNUM_Pos) /*!< 0x00000008 */
8191+
8192+
#define USB_OTG_FRMNUM_Pos (21U)
8193+
#define USB_OTG_FRMNUM_Msk (0xFU << USB_OTG_FRMNUM_Pos) /*!< 0x01E00000 */
8194+
#define USB_OTG_FRMNUM USB_OTG_FRMNUM_Msk /*!< Frame number */
8195+
#define USB_OTG_FRMNUM_0 (0x1U << USB_OTG_FRMNUM_Pos) /*!< 0x00200000 */
8196+
#define USB_OTG_FRMNUM_1 (0x2U << USB_OTG_FRMNUM_Pos) /*!< 0x00400000 */
8197+
#define USB_OTG_FRMNUM_2 (0x4U << USB_OTG_FRMNUM_Pos) /*!< 0x00800000 */
8198+
#define USB_OTG_FRMNUM_3 (0x8U << USB_OTG_FRMNUM_Pos) /*!< 0x01000000 */
82468199
/**
82478200
* @}
82488201
*/

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