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system: F4: update STM32F4xx HAL Drivers to v1.7.13
Included in STM32CubeF4 FW v1.26.2 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
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‎system/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h‎

Lines changed: 99 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,14 @@ extern "C" {
3838
#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
3939
#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
4040
#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
41+
#if defined(STM32U5)
42+
#define CRYP_DATATYPE_32B CRYP_NO_SWAP
43+
#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP
44+
#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP
45+
#define CRYP_DATATYPE_1B CRYP_BIT_SWAP
46+
#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF
47+
#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF
48+
#endif /* STM32U5 */
4149
/**
4250
* @}
4351
*/
@@ -210,6 +218,10 @@ extern "C" {
210218
* @}
211219
*/
212220

221+
/**
222+
* @}
223+
*/
224+
213225
/** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
214226
* @{
215227
*/
@@ -235,7 +247,7 @@ extern "C" {
235247
#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
236248
#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
237249

238-
#if defined(STM32G4) || defined(STM32H7)
250+
#if defined(STM32G4) || defined(STM32H7) || defined (STM32U5)
239251
#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL
240252
#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL
241253
#endif
@@ -382,7 +394,6 @@ extern "C" {
382394
#define DAC_TRIGGER_LP2_OUT DAC_TRIGGER_LPTIM2_OUT
383395

384396
#endif /* STM32H7 */
385-
386397
/**
387398
* @}
388399
*/
@@ -470,15 +481,24 @@ extern "C" {
470481
#define OB_BOOT_ENTRY_FORCED_FLASH OB_BOOT_LOCK_ENABLE
471482
#endif
472483
#if defined(STM32H7)
473-
#define FLASH_FLAG_SNECCE_BANK1RR FLASH_FLAG_SNECCERR_BANK1
474-
#define FLASH_FLAG_DBECCE_BANK1RR FLASH_FLAG_DBECCERR_BANK1
475-
#define FLASH_FLAG_STRBER_BANK1R FLASH_FLAG_STRBERR_BANK1
476-
#define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2
477-
#define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2
478-
#define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2
479-
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
480-
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
484+
#define FLASH_FLAG_SNECCE_BANK1RR FLASH_FLAG_SNECCERR_BANK1
485+
#define FLASH_FLAG_DBECCE_BANK1RR FLASH_FLAG_DBECCERR_BANK1
486+
#define FLASH_FLAG_STRBER_BANK1R FLASH_FLAG_STRBERR_BANK1
487+
#define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2
488+
#define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2
489+
#define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2
490+
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
491+
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
481492
#endif /* STM32H7 */
493+
#if defined(STM32U5)
494+
#define OB_USER_nRST_STOP OB_USER_NRST_STOP
495+
#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
496+
#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
497+
#define OB_USER_nSWBOOT0 OB_USER_NSWBOOT0
498+
#define OB_USER_nBOOT0 OB_USER_NBOOT0
499+
#define OB_nBOOT0_RESET OB_NBOOT0_RESET
500+
#define OB_nBOOT0_SET OB_NBOOT0_SET
501+
#endif /* STM32U5 */
482502

483503
/**
484504
* @}
@@ -521,6 +541,7 @@ extern "C" {
521541
#define HAL_SYSCFG_EnableIOAnalogSwitchVDD HAL_SYSCFG_EnableIOSwitchVDD
522542
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
523543
#endif /* STM32G4 */
544+
524545
/**
525546
* @}
526547
*/
@@ -595,12 +616,12 @@ extern "C" {
595616
#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
596617
#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
597618

598-
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB)
619+
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB) || defined(STM32U5)
599620
#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
600621
#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
601622
#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
602623
#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
603-
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB*/
624+
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB || STM32U5*/
604625

605626
#if defined(STM32L1)
606627
#define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
@@ -853,6 +874,10 @@ extern "C" {
853874
#define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS
854875
#define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS
855876

877+
#if defined(STM32U5)
878+
#define LPTIM_ISR_CC1 LPTIM_ISR_CC1IF
879+
#define LPTIM_ISR_CC2 LPTIM_ISR_CC2IF
880+
#endif /* STM32U5 */
856881
/**
857882
* @}
858883
*/
@@ -1379,6 +1404,20 @@ extern "C" {
13791404
*/
13801405
#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 */
13811406

1407+
#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \
1408+
|| defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \
1409+
|| defined(STM32H7) || defined(STM32U5)
1410+
/** @defgroup DMA2D_Aliases DMA2D API Aliases
1411+
* @{
1412+
*/
1413+
#define HAL_DMA2D_DisableCLUT HAL_DMA2D_CLUTLoading_Abort /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort
1414+
for compatibility with legacy code */
1415+
/**
1416+
* @}
1417+
*/
1418+
1419+
#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 || STM32U5 */
1420+
13821421
/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
13831422
* @{
13841423
*/
@@ -1397,6 +1436,29 @@ extern "C" {
13971436
* @}
13981437
*/
13991438

1439+
/** @defgroup HAL_DCACHE_Aliased_Functions HAL DCACHE Aliased Functions maintained for legacy purpose
1440+
* @{
1441+
*/
1442+
1443+
#if defined(STM32U5)
1444+
#define HAL_DCACHE_CleanInvalidateByAddr HAL_DCACHE_CleanInvalidByAddr
1445+
#define HAL_DCACHE_CleanInvalidateByAddr_IT HAL_DCACHE_CleanInvalidByAddr_IT
1446+
#endif /* STM32U5 */
1447+
1448+
/**
1449+
* @}
1450+
*/
1451+
1452+
#if !defined(STM32F2)
1453+
/** @defgroup HASH_alias HASH API alias
1454+
* @{
1455+
*/
1456+
#define HAL_HASHEx_IRQHandler HAL_HASH_IRQHandler /*!< Redirection for compatibility with legacy code */
1457+
/**
1458+
*
1459+
* @}
1460+
*/
1461+
#endif /* STM32F2 */
14001462
/** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
14011463
* @{
14021464
*/
@@ -3329,7 +3391,20 @@ extern "C" {
33293391
#define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2
33303392
#define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2
33313393
#define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1
3332-
3394+
#if defined(STM32U5)
3395+
#define MSIKPLLModeSEL RCC_MSIKPLL_MODE_SEL
3396+
#define MSISPLLModeSEL RCC_MSISPLL_MODE_SEL
3397+
#define __HAL_RCC_AHB21_CLK_DISABLE __HAL_RCC_AHB2_1_CLK_DISABLE
3398+
#define __HAL_RCC_AHB22_CLK_DISABLE __HAL_RCC_AHB2_2_CLK_DISABLE
3399+
#define __HAL_RCC_AHB1_CLK_Disable_Clear __HAL_RCC_AHB1_CLK_ENABLE
3400+
#define __HAL_RCC_AHB21_CLK_Disable_Clear __HAL_RCC_AHB2_1_CLK_ENABLE
3401+
#define __HAL_RCC_AHB22_CLK_Disable_Clear __HAL_RCC_AHB2_2_CLK_ENABLE
3402+
#define __HAL_RCC_AHB3_CLK_Disable_Clear __HAL_RCC_AHB3_CLK_ENABLE
3403+
#define __HAL_RCC_APB1_CLK_Disable_Clear __HAL_RCC_APB1_CLK_ENABLE
3404+
#define __HAL_RCC_APB2_CLK_Disable_Clear __HAL_RCC_APB2_CLK_ENABLE
3405+
#define __HAL_RCC_APB3_CLK_Disable_Clear __HAL_RCC_APB3_CLK_ENABLE
3406+
#define IS_RCC_MSIPLLModeSelection IS_RCC_MSIPLLMODE_SELECT
3407+
#endif
33333408
/**
33343409
* @}
33353410
*/
@@ -3346,7 +3421,7 @@ extern "C" {
33463421
/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
33473422
* @{
33483423
*/
3349-
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL)
3424+
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5)
33503425
#else
33513426
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
33523427
#endif
@@ -3403,13 +3478,22 @@ extern "C" {
34033478
* @}
34043479
*/
34053480

3406-
/** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
3481+
/** @defgroup HAL_SD_Aliased_Macros HAL SD/MMC Aliased Macros maintained for legacy purpose
34073482
* @{
34083483
*/
34093484

34103485
#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
34113486
#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
34123487

3488+
#if !defined(STM32F1) && !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32L1)
3489+
#define eMMC_HIGH_VOLTAGE_RANGE EMMC_HIGH_VOLTAGE_RANGE
3490+
#define eMMC_DUAL_VOLTAGE_RANGE EMMC_DUAL_VOLTAGE_RANGE
3491+
#define eMMC_LOW_VOLTAGE_RANGE EMMC_LOW_VOLTAGE_RANGE
3492+
3493+
#define SDMMC_NSpeed_CLK_DIV SDMMC_NSPEED_CLK_DIV
3494+
#define SDMMC_HSpeed_CLK_DIV SDMMC_HSPEED_CLK_DIV
3495+
#endif
3496+
34133497
#if defined(STM32F4) || defined(STM32F2)
34143498
#define SD_SDMMC_DISABLED SD_SDIO_DISABLED
34153499
#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY

‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cec.h‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -121,14 +121,14 @@ typedef struct
121121
* b6 Error information
122122
* 0 : No Error
123123
* 1 : Error
124-
* b5 IP initialization status
125-
* 0 : Reset (IP not initialized)
126-
* 1 : Init done (IP initialized. HAL CEC Init function already called)
124+
* b5 CEC peripheral initialization status
125+
* 0 : Reset (peripheral not initialized)
126+
* 1 : Init done (peripheral initialized. HAL CEC Init function already called)
127127
* b4-b3 (not used)
128128
* xx : Should be set to 00
129129
* b2 Intrinsic process state
130130
* 0 : Ready
131-
* 1 : Busy (IP busy with some configuration or internal operations)
131+
* 1 : Busy (peripheral busy with some configuration or internal operations)
132132
* b1 (not used)
133133
* x : Should be set to 0
134134
* b0 Tx state
@@ -138,9 +138,9 @@ typedef struct
138138
* RxState value coding follow below described bitmap :
139139
* b7-b6 (not used)
140140
* xx : Should be set to 00
141-
* b5 IP initialization status
142-
* 0 : Reset (IP not initialized)
143-
* 1 : Init done (IP initialized)
141+
* b5 CEC peripheral initialization status
142+
* 0 : Reset (peripheral not initialized)
143+
* 1 : Init done (peripheral initialized)
144144
* b4-b2 (not used)
145145
* xxx : Should be set to 000
146146
* b1 Rx state

‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dac.h‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -79,19 +79,19 @@ typedef struct
7979
__IO uint32_t ErrorCode; /*!< DAC Error code */
8080

8181
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
82-
void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
83-
void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
84-
void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
85-
void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
82+
void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
83+
void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
84+
void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
85+
void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
8686
#if defined(DAC_CHANNEL2_SUPPORT)
87-
void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
88-
void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
89-
void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
90-
void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
87+
void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
88+
void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
89+
void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
90+
void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
9191
#endif /* DAC_CHANNEL2_SUPPORT */
9292

93-
void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac);
94-
void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac);
93+
void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac);
94+
void (* MspDeInitCallback) (struct __DAC_HandleTypeDef *hdac);
9595
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
9696

9797
} DAC_HandleTypeDef;

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