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Merge pull request #1599 from ABOSTM/STM32F7_UPDATE_V1.16.2
Stm32 f7 update v1.16.2
2 parents aac9432 + f543478 commit 78762f7

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‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f722xx.h‎

Lines changed: 22 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -7,18 +7,17 @@
77
* This file contains:
88
* - Data structures and the address mapping for all peripherals
99
* - Peripheral's registers declarations and bits definition
10-
* - Macros to access peripheral�s registers hardware
10+
* - Macros to access peripheral's registers hardware
1111
*
1212
******************************************************************************
1313
* @attention
1414
*
15-
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
16-
* All rights reserved.</center></h2>
15+
* Copyright (c) 2016 STMicroelectronics.
16+
* All rights reserved.
1717
*
18-
* This software component is licensed by ST under BSD 3-Clause license,
19-
* the "License"; You may not use this file except in compliance with the
20-
* License. You may obtain a copy of the License at:
21-
* opensource.org/licenses/BSD-3-Clause
18+
* This software is licensed under terms that can be found in the LICENSE file
19+
* in the root directory of this software component.
20+
* If no LICENSE file comes with this software, it is provided AS-IS.
2221
*
2322
******************************************************************************
2423
*/
@@ -153,13 +152,13 @@ typedef enum
153152
* @brief Configuration of the Cortex-M7 Processor and Core Peripherals
154153
*/
155154
#define __CM7_REV 0x0100U /*!< Cortex-M7 revision r1p0 */
156-
#define __MPU_PRESENT 1 /*!< CM7 provides an MPU */
157-
#define __NVIC_PRIO_BITS 4 /*!< CM7 uses 4 Bits for the Priority Levels */
158-
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
159-
#define __FPU_PRESENT 1 /*!< FPU present */
160-
#define __ICACHE_PRESENT 1 /*!< CM7 instruction cache present */
161-
#define __DCACHE_PRESENT 1 /*!< CM7 data cache present */
162-
#include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */
155+
#define __MPU_PRESENT 1U /*!< CM7 provides an MPU */
156+
#define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */
157+
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
158+
#define __FPU_PRESENT 1U /*!< FPU present */
159+
#define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */
160+
#define __DCACHE_PRESENT 1U /*!< CM7 data cache present */
161+
#include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */
163162

164163

165164
#include "system_stm32f7xx.h"
@@ -1167,6 +1166,15 @@ typedef struct
11671166
* @{
11681167
*/
11691168

1169+
/** @addtogroup Hardware_Constant_Definition
1170+
* @{
1171+
*/
1172+
#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
1173+
1174+
/**
1175+
* @}
1176+
*/
1177+
11701178
/** @addtogroup Peripheral_Registers_Bits_Definition
11711179
* @{
11721180
*/
@@ -15459,4 +15467,3 @@ typedef struct
1545915467
#endif /* __STM32F722xx_H */
1546015468

1546115469

15462-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f723xx.h‎

Lines changed: 22 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -7,18 +7,17 @@
77
* This file contains:
88
* - Data structures and the address mapping for all peripherals
99
* - Peripheral's registers declarations and bits definition
10-
* - Macros to access peripheral�s registers hardware
10+
* - Macros to access peripheral's registers hardware
1111
*
1212
******************************************************************************
1313
* @attention
1414
*
15-
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
16-
* All rights reserved.</center></h2>
15+
* Copyright (c) 2016 STMicroelectronics.
16+
* All rights reserved.
1717
*
18-
* This software component is licensed by ST under BSD 3-Clause license,
19-
* the "License"; You may not use this file except in compliance with the
20-
* License. You may obtain a copy of the License at:
21-
* opensource.org/licenses/BSD-3-Clause
18+
* This software is licensed under terms that can be found in the LICENSE file
19+
* in the root directory of this software component.
20+
* If no LICENSE file comes with this software, it is provided AS-IS.
2221
*
2322
******************************************************************************
2423
*/
@@ -153,13 +152,13 @@ typedef enum
153152
* @brief Configuration of the Cortex-M7 Processor and Core Peripherals
154153
*/
155154
#define __CM7_REV 0x0100U /*!< Cortex-M7 revision r1p0 */
156-
#define __MPU_PRESENT 1 /*!< CM7 provides an MPU */
157-
#define __NVIC_PRIO_BITS 4 /*!< CM7 uses 4 Bits for the Priority Levels */
158-
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
159-
#define __FPU_PRESENT 1 /*!< FPU present */
160-
#define __ICACHE_PRESENT 1 /*!< CM7 instruction cache present */
161-
#define __DCACHE_PRESENT 1 /*!< CM7 data cache present */
162-
#include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */
155+
#define __MPU_PRESENT 1U /*!< CM7 provides an MPU */
156+
#define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */
157+
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
158+
#define __FPU_PRESENT 1U /*!< FPU present */
159+
#define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */
160+
#define __DCACHE_PRESENT 1U /*!< CM7 data cache present */
161+
#include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */
163162

164163

165164
#include "system_stm32f7xx.h"
@@ -1183,6 +1182,15 @@ typedef struct
11831182
* @{
11841183
*/
11851184

1185+
/** @addtogroup Hardware_Constant_Definition
1186+
* @{
1187+
*/
1188+
#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
1189+
1190+
/**
1191+
* @}
1192+
*/
1193+
11861194
/** @addtogroup Peripheral_Registers_Bits_Definition
11871195
* @{
11881196
*/
@@ -15553,4 +15561,3 @@ typedef struct
1555315561
#endif /* __STM32F723xx_H */
1555415562

1555515563

15556-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f730xx.h‎

Lines changed: 22 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -7,18 +7,17 @@
77
* This file contains:
88
* - Data structures and the address mapping for all peripherals
99
* - Peripheral's registers declarations and bits definition
10-
* - Macros to access peripheral�s registers hardware
10+
* - Macros to access peripheral's registers hardware
1111
*
1212
******************************************************************************
1313
* @attention
1414
*
15-
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
16-
* All rights reserved.</center></h2>
15+
* Copyright (c) 2016 STMicroelectronics.
16+
* All rights reserved.
1717
*
18-
* This software component is licensed by ST under BSD 3-Clause license,
19-
* the "License"; You may not use this file except in compliance with the
20-
* License. You may obtain a copy of the License at:
21-
* opensource.org/licenses/BSD-3-Clause
18+
* This software is licensed under terms that can be found in the LICENSE file
19+
* in the root directory of this software component.
20+
* If no LICENSE file comes with this software, it is provided AS-IS.
2221
*
2322
******************************************************************************
2423
*/
@@ -154,13 +153,13 @@ typedef enum
154153
* @brief Configuration of the Cortex-M7 Processor and Core Peripherals
155154
*/
156155
#define __CM7_REV 0x0100U /*!< Cortex-M7 revision r1p0 */
157-
#define __MPU_PRESENT 1 /*!< CM7 provides an MPU */
158-
#define __NVIC_PRIO_BITS 4 /*!< CM7 uses 4 Bits for the Priority Levels */
159-
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
160-
#define __FPU_PRESENT 1 /*!< FPU present */
161-
#define __ICACHE_PRESENT 1 /*!< CM7 instruction cache present */
162-
#define __DCACHE_PRESENT 1 /*!< CM7 data cache present */
163-
#include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */
156+
#define __MPU_PRESENT 1U /*!< CM7 provides an MPU */
157+
#define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */
158+
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
159+
#define __FPU_PRESENT 1U /*!< FPU present */
160+
#define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */
161+
#define __DCACHE_PRESENT 1U /*!< CM7 data cache present */
162+
#include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */
164163

165164

166165
#include "system_stm32f7xx.h"
@@ -1217,6 +1216,15 @@ typedef struct
12171216
* @{
12181217
*/
12191218

1219+
/** @addtogroup Hardware_Constant_Definition
1220+
* @{
1221+
*/
1222+
#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
1223+
1224+
/**
1225+
* @}
1226+
*/
1227+
12201228
/** @addtogroup Peripheral_Registers_Bits_Definition
12211229
* @{
12221230
*/
@@ -15778,4 +15786,3 @@ typedef struct
1577815786
#endif /* __STM32F730xx_H */
1577915787

1578015788

15781-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f732xx.h‎

Lines changed: 22 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -7,18 +7,17 @@
77
* This file contains:
88
* - Data structures and the address mapping for all peripherals
99
* - Peripheral's registers declarations and bits definition
10-
* - Macros to access peripheral�s registers hardware
10+
* - Macros to access peripheral's registers hardware
1111
*
1212
******************************************************************************
1313
* @attention
1414
*
15-
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
16-
* All rights reserved.</center></h2>
15+
* Copyright (c) 2016 STMicroelectronics.
16+
* All rights reserved.
1717
*
18-
* This software component is licensed by ST under BSD 3-Clause license,
19-
* the "License"; You may not use this file except in compliance with the
20-
* License. You may obtain a copy of the License at:
21-
* opensource.org/licenses/BSD-3-Clause
18+
* This software is licensed under terms that can be found in the LICENSE file
19+
* in the root directory of this software component.
20+
* If no LICENSE file comes with this software, it is provided AS-IS.
2221
*
2322
******************************************************************************
2423
*/
@@ -154,13 +153,13 @@ typedef enum
154153
* @brief Configuration of the Cortex-M7 Processor and Core Peripherals
155154
*/
156155
#define __CM7_REV 0x0100U /*!< Cortex-M7 revision r1p0 */
157-
#define __MPU_PRESENT 1 /*!< CM7 provides an MPU */
158-
#define __NVIC_PRIO_BITS 4 /*!< CM7 uses 4 Bits for the Priority Levels */
159-
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
160-
#define __FPU_PRESENT 1 /*!< FPU present */
161-
#define __ICACHE_PRESENT 1 /*!< CM7 instruction cache present */
162-
#define __DCACHE_PRESENT 1 /*!< CM7 data cache present */
163-
#include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */
156+
#define __MPU_PRESENT 1U /*!< CM7 provides an MPU */
157+
#define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */
158+
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
159+
#define __FPU_PRESENT 1U /*!< FPU present */
160+
#define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */
161+
#define __DCACHE_PRESENT 1U /*!< CM7 data cache present */
162+
#include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */
164163

165164

166165
#include "system_stm32f7xx.h"
@@ -1201,6 +1200,15 @@ typedef struct
12011200
* @{
12021201
*/
12031202

1203+
/** @addtogroup Hardware_Constant_Definition
1204+
* @{
1205+
*/
1206+
#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
1207+
1208+
/**
1209+
* @}
1210+
*/
1211+
12041212
/** @addtogroup Peripheral_Registers_Bits_Definition
12051213
* @{
12061214
*/
@@ -15684,4 +15692,3 @@ typedef struct
1568415692
#endif /* __STM32F732xx_H */
1568515693

1568615694

15687-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f733xx.h‎

Lines changed: 22 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -7,18 +7,17 @@
77
* This file contains:
88
* - Data structures and the address mapping for all peripherals
99
* - Peripheral's registers declarations and bits definition
10-
* - Macros to access peripheral�s registers hardware
10+
* - Macros to access peripheral's registers hardware
1111
*
1212
******************************************************************************
1313
* @attention
1414
*
15-
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
16-
* All rights reserved.</center></h2>
15+
* Copyright (c) 2016 STMicroelectronics.
16+
* All rights reserved.
1717
*
18-
* This software component is licensed by ST under BSD 3-Clause license,
19-
* the "License"; You may not use this file except in compliance with the
20-
* License. You may obtain a copy of the License at:
21-
* opensource.org/licenses/BSD-3-Clause
18+
* This software is licensed under terms that can be found in the LICENSE file
19+
* in the root directory of this software component.
20+
* If no LICENSE file comes with this software, it is provided AS-IS.
2221
*
2322
******************************************************************************
2423
*/
@@ -154,13 +153,13 @@ typedef enum
154153
* @brief Configuration of the Cortex-M7 Processor and Core Peripherals
155154
*/
156155
#define __CM7_REV 0x0100U /*!< Cortex-M7 revision r1p0 */
157-
#define __MPU_PRESENT 1 /*!< CM7 provides an MPU */
158-
#define __NVIC_PRIO_BITS 4 /*!< CM7 uses 4 Bits for the Priority Levels */
159-
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
160-
#define __FPU_PRESENT 1 /*!< FPU present */
161-
#define __ICACHE_PRESENT 1 /*!< CM7 instruction cache present */
162-
#define __DCACHE_PRESENT 1 /*!< CM7 data cache present */
163-
#include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */
156+
#define __MPU_PRESENT 1U /*!< CM7 provides an MPU */
157+
#define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */
158+
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
159+
#define __FPU_PRESENT 1U /*!< FPU present */
160+
#define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */
161+
#define __DCACHE_PRESENT 1U /*!< CM7 data cache present */
162+
#include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */
164163

165164

166165
#include "system_stm32f7xx.h"
@@ -1217,6 +1216,15 @@ typedef struct
12171216
* @{
12181217
*/
12191218

1219+
/** @addtogroup Hardware_Constant_Definition
1220+
* @{
1221+
*/
1222+
#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
1223+
1224+
/**
1225+
* @}
1226+
*/
1227+
12201228
/** @addtogroup Peripheral_Registers_Bits_Definition
12211229
* @{
12221230
*/
@@ -15778,4 +15786,3 @@ typedef struct
1577815786
#endif /* __STM32F733xx_H */
1577915787

1578015788

15781-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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