@@ -34,7 +34,7 @@ extern "C" {
3434
3535#define NOT_AN_INTERRUPT NC // -1
3636#define DEND PEND
37- #define NUM_DIGITAL_PINS DEND
37+ #define NUM_DIGITAL_PINS ((uint32_t) DEND)
3838#define NUM_ANALOG_INPUTS (AEND-A0)
3939
4040// Convert a digital pin number Dxx to a PinName PX_n
@@ -62,9 +62,34 @@ uint32_t pinNametoDigitalPin(PinName p);
6262 pin_in_pinmap(digitalPinToPinName(p), PinMap_SPI_SSEL))
6363
6464
65- #define digitalPinToPort (p ) (get_GPIO_Port(digitalPinToPinName(p)))
65+ #define digitalPinToPort (p ) (get_GPIO_Port(STM_PORT( digitalPinToPinName(p) )))
6666#define digitalPinToBitMask (p ) (STM_GPIO_PIN(digitalPinToPinName(p)))
6767
68+ #define analogInPinToBit (p ) (STM_PIN(digitalPinToPinName(p)))
69+ #define portOutputRegister (P ) (&(P->ODR))
70+ #define portInputRegister (P ) (&(P->IDR))
71+
72+ #define portSetRegister (P ) (&(P->BSRR))
73+ #if defined(STM32F2xx ) || defined(STM32F4xx ) || defined(STM32F7xx )
74+ // For those series reset are in the high part so << 16U needed
75+ #define portClearRegister (P ) (&(P->BSRR))
76+ #else
77+ #define portClearRegister (P ) (&(P->BRR))
78+ #endif
79+
80+
81+ #if defined(STM32F1xx )
82+ // Config registers split in 2 registers:
83+ // CRL: pin 0..7
84+ // CRH: pin 8..15
85+ // Return only CRL
86+ #define portModeRegister (P ) (&(P->CRL))
87+ #else
88+ #define portModeRegister (P ) (&(P->MODER))
89+ #endif
90+ #define portConfigRegister (P ) (portModeRegister(P))
91+
92+
6893#define digitalPinIsValid (p ) (digitalPinToPinName(p) != NC)
6994
7095// As some pin could be duplicated in digitalPin[]
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