Adds Ethernet pins configuration

Signed-off-by: fpr <fabien.perroquin@wi6labs.com>

Author: fpr

cores/arduino/stm32/PeripheralPins.h

@@ -62,5 +62,8 @@ extern const PinMap PinMap_SPI_SSEL[];
 extern const PinMap PinMap_CAN_RD[];
 extern const PinMap PinMap_CAN_TD[];
 
+//*** ETHERNET ***
+extern const PinMap PinMap_Ethernet[];
+
 #endif
 

variants/NUCLEO_F429ZI/PeripheralPins.c

@@ -337,3 +337,36 @@ const PinMap PinMap_CAN_TD[] = {
     {PD1,   CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
     {NC,    NP,    0}
 };
+
+//*** Ethernet ***
+
+/* Configured for RMII mapping */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+const PinMap PinMap_Ethernet[] = {
+    // {PA0,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_CRS
+    {PA1,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_REF_CLK|ETH_RX_CLK
+    {PA2,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_MDIO
+    // {PA3,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_COL
+    {PA7,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_CRS_DV|ETH_RX_DV
+    // {PB0,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_RXD2
+    // {PB1,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_RXD3
+    // {PB5,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_PPS_OUT
+    // {PB8,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_TXD3
+    // {PB10,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_RX_ER
+    // {PB11,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_TX_EN
+    // {PB12,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_TXD0
+    {PB13,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_TXD1
+    {PC1,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_MDC
+    // {PC2,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_TXD2
+    // {PC3,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_TX_CLK
+    {PC4,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_RXD0
+    {PC5,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_RXD1
+    // {PE2,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_TXD3
+    // {PG8,   ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_PPS_OUT
+    {PG11,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_TX_EN
+    {PG13,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_TXD0
+    // {PG14,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)},  // ETH_TXD1
+    {NC,    NP,    0}
+};
+#endif