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[stm32] Update STM32L562QEIxQ configurations and README
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‎README.md‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -192,7 +192,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
192192
| :green_heart: | STM32H573IIKxQ | [STM32H573I-DK](https://www.st.com/en/evaluation-tools/stm32h573i-dk.html) | *2.6.0* | |
193193
| :green_heart: | STM32H747XIHx | [STM32H747I-DISCO](https://www.st.com/en/evaluation-tools/stm32h747i-disco.html) | *2.7.0* | |
194194
| :green_heart: | STM32L4S5VI | [B-L4S5I-IOT01A](https://www.st.com/en/evaluation-tools/b-l4s5i-iot01a.html) | *2.0.0* | |
195-
| :yellow_heart: | STM32L562QEIxQ | [STM32L562E-DK](https://www.st.com/en/evaluation-tools/stm32l562e-dk.html) | *2.0.0* | |
195+
| :yellow_heart: | STM32L562QEIxQ | [STM32L562E-DK](https://www.st.com/en/evaluation-tools/stm32l562e-dk.html) | *2.11.0* | |
196196
| :green_heart: | STM32U585AIIxQ | [B-U585I-IOT02A](https://www.st.com/en/evaluation-tools/b-u585i-iot02a.html) | *2.1.0* | |
197197
| :green_heart: | STM32WB5MMG | [STM32WB5MM-DK](https://www.st.com/en/evaluation-tools/stm32wb5mm-dk.html) | *2.1.0* | |
198198

@@ -745,7 +745,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
745745
| :----: | :-------: | ---- | :-----: | :---- |
746746
| :green_heart: | STM32L552ZC-Q<br>STM32L552ZE-Q | Generic Board | *2.0.0* | |
747747
| :green_heart: | STM32L562ZE-Q | Generic Board | *2.0.0* | |
748-
| :yellow_heart: | STM32L562QEIxQ | Generic Board | *2.0.0* | |
748+
| :yellow_heart: | STM32L562QEIxQ | Generic Board | *2.11.0* | |
749749

750750
### Generic STM32U0 boards
751751

‎variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/generic_clock.c‎

Lines changed: 6 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,8 @@
2222
WEAK void SystemClock_Config(void)
2323
{
2424
/* SystemClock_Config can be generated by STM32CubeMX */
25-
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
26-
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
25+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
26+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
2727

2828
/** Configure the main internal regulator output voltage
2929
*/
@@ -32,18 +32,12 @@ WEAK void SystemClock_Config(void)
3232
Error_Handler();
3333
}
3434

35-
/** Configure LSE Drive Capability
36-
*/
37-
HAL_PWR_EnableBkUpAccess();
38-
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
39-
4035
/** Initializes the RCC Oscillators according to the specified parameters
4136
* in the RCC_OscInitTypeDef structure.
4237
*/
43-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSE
44-
|RCC_OSCILLATORTYPE_MSI;
45-
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
38+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI48;
4639
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
40+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
4741
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
4842
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
4943
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
@@ -62,8 +56,8 @@ WEAK void SystemClock_Config(void)
6256

6357
/** Initializes the CPU, AHB and APB buses clocks
6458
*/
65-
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
66-
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
59+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
60+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
6761
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
6862
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
6963
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;

‎variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/variant_STM32L562E_DK.cpp‎

Lines changed: 61 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -142,77 +142,85 @@ const uint32_t analogInputPin[] = {
142142
36, // A14, PC4
143143
37 // A15, PC5
144144
};
145-
145+
146146
// ----------------------------------------------------------------------------
147147
#ifdef __cplusplus
148148
extern "C" {
149149
#endif
150-
150+
151151
/**
152152
* @brief System Clock Configuration
153153
* @param None
154154
* @retval None
155155
*/
156156
WEAK void SystemClock_Config(void)
157157
{
158-
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
159-
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
158+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
159+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
160+
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
160161

161-
/** Configure the main internal regulator output voltage
162-
*/
163-
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE0) != HAL_OK)
164-
{
165-
Error_Handler();
166-
}
162+
// Configure the main internal regulator output voltage
163+
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE0) != HAL_OK)
164+
{
165+
Error_Handler();
166+
}
167167

168-
/** Configure LSE Drive Capability
169-
*/
170-
HAL_PWR_EnableBkUpAccess();
171-
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
168+
// on board LSE 32.768 kHz
169+
// internal HSI 16 MHz
170+
// SDMMC = 48 MHz
171+
// note: the HSE is not mounted by default on the DK
172+
// PLLCLK=( PLLM Input Clock×PLLN÷PLLR
173+
// 96 = 48 * 4 / 2
174+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE
175+
| RCC_OSCILLATORTYPE_HSI48;
176+
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
177+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
178+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
179+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
180+
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
181+
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
182+
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; // 48 MHz
183+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
184+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; // 48 MHz
185+
RCC_OscInitStruct.PLL.PLLM = 1;
186+
RCC_OscInitStruct.PLL.PLLN = 4; // 48 * 4 = 192 Mhz
187+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV8; // 24 Mhz
188+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; // 48 Mhz
189+
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; // 96 Mhz
190+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
191+
{
192+
Error_Handler();
193+
}
172194

173-
/** Initializes the RCC Oscillators according to the specified parameters
174-
* in the RCC_OscInitTypeDef structure.
175-
*/
176-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSE
177-
|RCC_OSCILLATORTYPE_MSI;
178-
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
179-
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
180-
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
181-
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
182-
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
183-
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11;
184-
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
185-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
186-
RCC_OscInitStruct.PLL.PLLM = 12;
187-
RCC_OscInitStruct.PLL.PLLN = 55;
188-
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
189-
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
190-
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
191-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
192-
{
193-
Error_Handler();
194-
}
195+
/** Initializes the CPU, AHB and APB buses clocks */
196+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
197+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
195198

196-
/** Initializes the CPU, AHB and APB buses clocks
197-
*/
198-
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
199-
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
200-
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
201-
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
202-
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
203-
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
199+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 96 Mhz
200+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // Advanced High-performance Bus 96 Mhz
201+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // Advanced Peripheral Bus 1 96 Mhz
202+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // Advanced Peripheral Bus 2 96 Mhz
203+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
204+
{
205+
Error_Handler();
206+
}
204207

205-
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
206-
{
207-
Error_Handler();
208-
}
208+
// Configure the other peripheral clocks
209+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB
210+
| RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_SDMMC1;
211+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
212+
PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
213+
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLP; // 24 for conservatism
209214

210-
/** Enable MSI Auto calibration
211-
*/
212-
HAL_RCCEx_EnableMSIPLLMode();
215+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
216+
Error_Handler();
217+
}
218+
219+
/** Enable MSI Auto calibration */
220+
HAL_RCCEx_EnableMSIPLLMode();
213221
}
214-
222+
215223
#ifdef __cplusplus
216224
}
217225
#endif
218-
#endif /* ARDUINO_STM32L562E_DK */
226+
#endif /* ARDUINO_STM32L562E_DK */

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